Digital to analog converter having separate bit converters

An improved monolithic D/A converter able to convert N-bit words, of the type including N weighted current sources connected to switching circuits, each switching circuit being controlled by a bit of the word to be converted and steering the current of the associated source either towards an output line or towards a dump line, according to the value of the control bit, wherein the improvement comprises:

• a first group of weighted current sources of a first type including a high order master current source, n slave current source for generating the high order weighted currents and a slave source which is the image of one of said high order current sources, a second group of weighted current sources of a second type including a low order master current source and m slave sources generating the low order weighted currents, with N=n+m, a first group of n switching circuits of a first type connected to said n high order weighted current sources, each switching circuit being provided with an input receiving the current from the source to which it is connected and two outputs, one output being connected to the output line and the second one being connected to the dump line and at least a control input for receiving one bit of the word to be converted, a second group of m switching circuits of a second type connected to the m low order weighted current sources, each switching circuit being provided with an input for receiving the current from the source to which it is connected and two outputs, one output being connected to the output line and the second output being connected to the dump line and at least a control input receiving one bit of the word to be converted, a reference voltage generator being provided with an output delivering a stabilized voltage, first calibrating means connected between the output terminal of said reference voltage generator and said high order master current source, to provide a first calibrating current in accordance with the reference voltage, to said master source, second calibrating means connected to the output terminal of the reference voltage generator and receiving the current from said image source and providing to said low order master source a second calibrating current, the value of which is established relatively to the value of said image source current with a given multiple of two;
• said current sources of said first group being comprised of identical cells, each cell including a Darlington circuit of switching and driving transistors, the arrangement, comprising at least a pair of transistors, the switching transistor of each pair having an individually biased base and the driving transistor of the pair having a base connected in common with the corresponding bases of the other driving transistors in the other said cells in said source, the number of said cells in each said source defining the current of said source;
• and
• said current sources of said second group being comprised of a certain number of identical cells, each said cell including a single transistor.