Timing signal generation and distribution system for TDM telecommunications systems
AssigneeRedcom Laboratories, Inc.
InventorsCharles J. Breidenstein, Jerome S. Caplan, Bruce G. Littlefield
Life of this patent
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AssigneeRedcom Laboratories, Inc.
InventorsCharles J. Breidenstein, Jerome S. Caplan, Bruce G. Littlefield
Estimating the term…
Synchronous operation of any number of digital switching units of a TDM system is maintained by interconnecting the switching units to a timing signal highway which distributes timing signals generated by sources of such signals in any one of the units. The units are connected successively in a chain by timing signal distribution control lines. Validity signals are generated and transmitted by circuits in each unit along the lines so as to provide for transmission of timing signals generated in the first switching unit on to the timing signal highway and switch over of the timing signal generating function to successive ones of the units when the timing signal generation in preceding units becomes faulty.
For use in a time division switching system having a plurality of synchronously operable switching units connected to highways carrying messages, control signals and timing signals, a system for generating and distributing said timing signals which comprises
In a system having a plurality of units operable in synchronism with each other, a system for the generation and distribution of timing signals which comprises a timing signal bus connected to each of said units for distributing said timing signals thereto, a plurality of timing signal validity signal lines, separate validity signal generation and transmission circuits in each of said units, said circuits having inputs and outputs, said signal validity lines being connected between said inputs and outputs such that said units are connected in succession via said validity lines, each of said units having means for generating said timing signals, said validity signal generation and transmission circuits comprising means responsive to the presence of a validity signal at said input and the valid operation of said timing signal generating means for providing a validity signal at said output when at least one of said validity signals at said input and valid operation of said generating means is present, and means for applying the timing signals from said generating means to said bus when said validity signal at said input is absent.
Dependencies are inferred from the claim text.