Bipolar integrated semiconductor structure including I.sup.2 L and linear type devices and fabrication methods therefor

Abstract

This disclosure relates to a bipolar integrated semiconductor structure that has incorporated therein both I.sup.2 L and linear type bipolar devices. The integrated structure utilizes a double epitaxial layer deposited or formed on a starting substrate wherein at least one linear type bipolar device is incorporated in one portion of the final integrated structure and at least one I.sup.2 L bipolar device is incorporated in another portion of the final double epitaxial layer integrated structure. For the linear type bipolar device, the subcollector region is selectively located between the starting substrate and the first epitaxial layer whereas for the I.sup.2 L bipolar device, the sub-emitter region is selectively located between the first and the second epitaxial layers. Other features of the bipolar integrated semiconductor structure include polysilicon isolation for the I.sup.2 L and linear devices, up and down diffused PN junction isolation type regions, up-diffused base region for the I.sup.2 L device, Schottky type collectors for the I.sup.2 L device, up and down diffused base regions for the I.sup.2 L device isolate the collector contacts, and the use of another subcollector region selectively located between the first and the second epitaxial layer in the linear portion of the integrated semiconductor structure which functions to improve the current gain of the lateral PNP linear transistor device.

Dependencies are inferred from the claim text.