Self-stabilizing analog to digital converter useful in phase locked loop tuning systems

Apparatus comprising:

• comparator means for generating an output signal having a first level when the amplitude of a first input signal exceeds the amplitude of a second input signal and a second level when the amplitude of said second input signal exceeds the amplitude of said first input signal;
• voltage divider means having a controllable voltage division ratio for generating said first input signal by the voltage division of a reference voltage;
• first capacitive means;
• first charging means for selectively charging said first capacitive means during a first predetermined period to generate said second input signal, said output signal changing levels at a time within said first predetermined period determined by said controllable division ratio;
• second capacitive means;
• second charging means for selectively charging said second capacitive means during a second predetermined period after said first predetermined period in response to the magnitude of said second input voltage at the end of said first predetermined period to develop said reference voltage;
• and
• utilization means responsive to said output signal for generating a binary word determined by the time interval between the beginning of said first predetermined period and said time when said output signal changes levels.