System for monitoring the validity of electrical data fed to a number of n functionally parallel-connected data channels

A system for monitoring the validity of electrical data appearing on n functionally parallel-connected data channels according to a fixed criterion, wherein no conclusions are drawn as to the validity of such data if the data on more than m of said n channels are different, at least during a predetermined period of time, from the data on the remaining ones of said n channels, said system comprising, n being an integer greater than one and m being a positive integer less than n:

• a first q of n selective logic system, wherein q=n-m, said first selective logic system being adapted to generate a data signal at its output which corresponds to identical data present on at least q of said n channels;
• n channel-related comparison elements, each of said comparison elements being for comparing the data appearing on a respective one of said n channels with said data signal generated by said first selective logic system;
• n marking units, each of said marking units being associated with a respective one of said comparison elements and being adapted to register the result of the comparison made by its respective comparison element;
• a second q of n selective logic system which generates a first signal when the information registered in said marking units indicates that the data on at least q of said n channels are the same as the data signal generated by said first selective logic system and which otherwise generates a second signal;
• and
• means for generating a modulated channel data signal, said modulated channel data signal being applied to said comparison elements;
• said marking units, said comparison elements and said second selective logic system cooperating in such a manner that said second selective logic system generates an alternating current signal corresponding to said modulated signal when a q out of n condition exists and a direct-current signal when a q out of n condition does not exist, said modulated signal being applied to said comparison unit as both a data carrier signal and a test frequency signal, each of said marking units being inhibited from outputting a signal representative of said result of said comparison, whenever the associated one of said comparison units fails for at least a predetermined period of time to output a signal having said test frequency, such that whenever an internal fault occurs in any of said marking units or in said second selective logic system, an output signal is produced responsive to the occurrence of said fault by the respective marking unit or second selective logic system which is the same as that produced by said faulty element upon the registration of deviating channel data;
• said alternating current signal being a signal whose maximum and minimum values are alternately situated above and below a pre-determined signal range, said direct current signal being a signal whose maximum and minimum values are situated symmetrically outside of said signal range if they are situated outside of said range.