Daisy chaining of device interrupts in a cathode ray tube device

A terminal system comprising:

• a system bus;
• a memory subsystem coupled to said system bus and storing service routines in a read only memory;
• a central processor subsystem coupled to said system bus including a microprocessor for generating a plurality of predetermined address signals in response to a microprocessor interrupt request signal;
• a plurality of peripheral device subsystems coupled to said system bus, said system bus including an external request interrupt signal line coupled in common to each of said plurality of peripheral device subsystems and said central processor subsystem, said system bus further including a plurality of external acknowledge interrupt signal lines coupled serially to each of said plurality of peripheral devices and said central processor subsystem, one of said plurality of peripheral device subsystems forcing said external request interrupt signal line to a first level, said one of said plurality of peripheral device subsystems being responsive to one of said plurality of external acknowledge interrupt signal lines at a first level for sending a plurality of address signals over said system bus to modify said predetermined address signals, said modified address signals being applied to said memory for reading a first location in said memory storing a first word of said service routines, said first word and subsequent words of said service routine being applied to said central processor unit for activating said one of said plurality of peripheral device subsystems;
• said central processor subsystem further including interrupt and priority means responsive to said external request interrupt signal for generating a first of said plurality of external acknowledge interrupt signal lines.