Frequency adjusting circuit
AssigneeCitizen Watch Co., Ltd.
InventorsMitsuo Sekine, Sizuo Yamaguchi
Life of this patent
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Abstract
A frequency adjusting circuit for digitally adjusting the frequency of a time reference signal consisting of a series of pulses is disclosed. The circuit function to adjust the frequency of said series of pulses by subtracting or adding a given number of pulses from or to said series of pulses for a time set beforehand every time upon receipt of a predetermined number of pulses of said time reference signal.
Claims10
A circuit digitally adjusting the frequency of a time reference signal comprising:
- means for generating an unadjusted time reference signal;
- means for adjusting the mean frequency of the time reference signal by adding a desired number of pulses to, or by subtracting a desired number of pulses from, said time reference signal;
- a frequency divider for generating an adjusted output frequency and a frequency adjusting instruction signal which initiates adjustment of the mean unadjusted frequency of the time reference signal by dividing the frequency of the output of the frequency adjusting means;
- a setting means for determining the time of effecting the frequency adjusting operation of the frequency adjusting means upon receipt of the frequency adjusting instruction signal.
A circuit for digitally adjusting the frequency of a time reference signal pulse train comprising:
- means for generating an unadjusted time reference signal;
- means for adjusting the main frequency of the time reference signal by adding a desired number of pulses to, or by subtracting a desired number of pulses from, the time reference signal;
- a frequency divider for generating an adjusted output frequency and a frequency adjusting instruction signal which initiates adjustment of the unadjusted frequency of the time reference signal by dividing the frequency of the output of the frequency adjusting means;
- a first setting means for determining the time of effecting the frequency adjusting operation of the frequency adjusting means upon receipt of the frequency adjusting signal;
- a second setting means to operate to add a pulse or pulses to, or to subtract a pulse or pulses from, the time reference signal.
A circuit for digitally adjusting the frequency of a time reference signal pulse train comprising:
- a. a time reference signal source generating an unadjusted time reference signal;
- b. a frequency adjusting means having an addition or subtraction circuit for adding or subtracting a number of pulses in accordance with an amount of frequency to be adjusted;
- c. an externally actuated means for controlling the amount of frequency to be adjusted by setting the amount of frequency to be added or subtracted;
- d. a frequency divider circuit for dividing signals adjusted by the frequency adjusting means;
- whereby a defined signal from the frequency divider circuit is applied to the frequency adjusting means and thereby determines the start timing of the frequency adjusting means.
A circuit for digitally adjusting the frequency of a time reference signal comprising:
- means for generating the time reference signal;
- means for adjusting the mean frequency of the time reference signal by adding a pulse or pulses to, or by subtracting a pulse or pulses from, the time reference signal;
- a frequency divider for generating a frequency adjusting instruction signal which initiates adjustment of the mean frequency of the time reference signal by dividing the frequency of the output of the frequency adjusting means;
- a setting means for determining the time of effecting the frequency adjusting operation of the frequency adjusting means upon receipt of the frequency adjusting instruction signal;
- wherein the frequency adjusting means includes a frequency doubler circuit for doubling the frequency of the time reference signal;
- and
- the frequency doubler circuit includes an Exclusive-OR gate and a toggle flip-flop, the Exclusive-OR gate having a frist input terminal supplied with the time reference signal as its input, a second input terminal connected to the output terminal of the toggle flip-flop, and an output terminal connected to the clock input of the toggle flip-flop.
A circuit for digitally adjusting the frequency of a time reference signal pulse train comprising:
- means for generating the time reference signal;
- means for adjusting the means frequency of the time reference signal by adding a pulse or pulses to, or by subtracting a pulse or pulses from, the time reference signal;
- a frequency divider for generating a frequency adjusting instruction signal which initiates adjustment of the frequency of the time reference signal by dividing the frequency of the output of the frequency adjusting means;
- a first setting means for determining the time of effecting the frequency adjusting operation of the frequency adjusting means upon receipt of the frequency adjusting signal;
- a second setting means for setting the frequency adjusting means to operate to add a pulse or pulses to, or subtract a pulse or pulses from, the time reference signal;
- wherein the frequency adjusting means includes a frequency doubler circuit for doubling the frequency of the time reference signal;
- and
- the frequency doubler circuit includes an Exclusive-OR gate and a toggle flip-flop, the Exclusive-OR gate having a first input terminal supplied with the time reference signal as its input, a second input terminal connected to the output of the toggle flip-flop, and an output terminal connected to the clock input of the toggle flip-flop.
Dependencies are inferred from the claim text.