Electronic timepiece
AssigneeTokyo Shibaura Electric Co., Ltd.
InventorsTeruaki Tanaka, Masao Kaizuka, Yuichi Takagi, Mitsuo Aihara
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AssigneeTokyo Shibaura Electric Co., Ltd.
InventorsTeruaki Tanaka, Masao Kaizuka, Yuichi Takagi, Mitsuo Aihara
Estimating the term…
An electronic timepiece comprises an oscillator, a frequency divider for frequency dividing the output signal of the oscillator to generate 100 Hz output pulse signals, time count circuits having a plurality of counters cascade-connected to count the output pulse signals of the frequency divider, a decoder circuit for decoding the output signal of the time count circuits to generate a display signal and a display device for displaying data corresponding to the output display signal of the decoder circuit, in which a stopwatch display mode and a normal time display mode may be selected by the operation of a switch. The electronic timepiece further includes a control circuit connected between the decoder circuit and display device and adapted to inhibit normal time display data from being supplied to the display device in response to the operation of the switch which sets the electronic timepiece into the stopwatch display mode.
An electronic timepiece comprising an oscillation circuit, a first time count circuit for performing an ordinary time count operation in response to an output signal of the oscillation circuit, a second time count circuit having a plurality of counters and adapted to perform a stopwatch time counting operation in response to an output signal of the oscillation circuit, liquid-crystal display means including a plurality of display sections, decoder means for decoding output count signals of said first and second time count circuits and delivering decoded output signals to said display means, a control circuit for connecting said first and second time count circuits selectively to said display means, said control circuit including means for generating a first control signal when said second time count circuit is performing a stopwatch time counting operation and a second control signal when said stopwatch time counting operation is terminated, and count display inhibiting means adapted, when said second time count circuit is connected by said control circuit to said display means to permit a stopwatch time counting operation, to render ineffective the count output signal of at least one counter in said second time count circuit supplying signals at a frequency in excess of 1 Hz., said count display inhibiting means including gating means for passing data from said second time count circuit to said display means, said gating means being gated off by said first control signal and gated on by said second control signal, and said inhibiting means being further adapted to supply a predetermined display signal to the corresponding display section in said display means irrespective of the count output signal of the counter, the counters supplying count output signals at a frequency below 1 Hz. continuing to supply said signals to said display means to permit display of counting data.
An electronic timepiece comprising an oscillator, a first time count circuit for performing a normal time count operation in response to the output signal of the oscillator, a second time count circuit for performing a stopwatch time counting operation in response to an output signal of said oscillator, liquid-crystal display means for displaying the contents of said first and second time count circuits, means for generating a first control signal in response to the commencement of a stopwatch time counting operation by said second time count circuit and a second control signal in response to the termination of said stopwatch time counting operation, and count display inhibiting means adapted, when said second time count circuit performs said stopwatch time counting operation, to inhibit the operation of a portion of said display means which is arranged to respond to a signal from said second time count circuit which changes at a frequency in excess of 1 Hz, said count display inhibiting means including gating means for passing data from said second time count circuit to said display means, said gating means being gated off by said first control signal and gated on by said second control signal, the portion of said display means which is arranged to respond to a signal from said second time count circuit which changes at a frequency below 1 Hz. continuing to display counting data.
Dependencies are inferred from the claim text.