Recursive digital filter comprising a circuit responsive to first sum and feedback sign bits and second sum sign and integer bits for detecting overflow in the second sum

In a recursive digital filter comprising a first adder responsive to each of input data words and a first feedback data word for producing a first sum data word, a second adder responsive to said first sum data word and a second feedback data word for producing a second sum data word, an overflow detect and correct circuit for detecting overflow in said second sum data word and producing a first of overflow-free data words by correcting, when overflow is detected, the detected overflow, a first and a second feedback device responsive to said first and all other overflow-free data words for producing said first and said second feedback data words, respectively, and means responsive to all said overflow-free data words for producing output data words, all said data words being given by two's complement representation in a common word format comprising a sign bit, an integer bit, and a predetermined number of fraction bits, each of all said data words thus having corresponding bits in others of all said data words, said first adder, said second feedback device, and said second adder substantially simultaneously producing the corresponding bits of the respective ones of said first sum, said second feedback, and said second sum data words in bit series, the improvement wherein said overflow detect and correct circuit comprises:

• first means responsive to the sign bits of said first sum, said second feedback, and said second sum data words and the integer bit of said second sum data word for producing an overflow detect pulse indicative of presence and absence of the overflow and a first polarity decision pulse indicative at least when said overflow detect pulse indicates presence of overflow, of polarities of the sign, the integer, and the fractional bits of said first overflow-free data word;
• second means responsive to said overflow detect and said first polarity decision pulses for producing, only when said overflow detect pulse indicates presence of overflow, the sign, the integer, and the fractional bits of said first overflow-free data word with polarities decided by said first polarity decision pulse;
• and
• third means responsive to said overflow detect pulse and said second sum data word for producing, only when said overflow detect pulse indicates absence of overflow, the sign, the integer, and the fractional bits of said first overflow-free data word with polarities determined by the corresponding bits of said second sum data word.