US 4,215,398 AGranted

Dual microprocessor intelligent programmable process control system with communication link

AssigneeTexas Instruments Incorporated

InventorsBobby G. Burkett, Michael L. Bunyard

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Abstract

An intelligent programmable process control system for controlling industrial processing and manufacturing equipment and the like utilizes a unique system of cooperating dual microprocessors. A digital microprocessor is utilized for digital computation and for controlling the analog portion of the processing equipment, and a boolean microprocessor is utilized for sequencing and for controlling the on/off states of devices located along the process in response to the on/off states of sensors located along the process according to a sequence of boolean logic functions. The digital microprocessor has overall supervisory control. Common memory provides a communication link between the two microprocessors. An arbitration circuit for resolving simultaneous or phased access to memory by the two microprocessors is provided. In addition, a circuit is provided for accomplishing parallel digital input/output functions, again accessible by both microprocessors. In one embodiment, means for linking arithmetic functions and non-arithmetic logic functions within a boolean-type instruction set is provided.

Claims34

Dependent claims

An intelligent programmable process control system responsive to the on/off states of sensors located along a process for controlling the on/off states of controllable devices located along said process comprising:

(a) a first microprocessor for performing digital operations and arithmetic computations;
(b) a second microprocessor for scanning and executing a sequence of boolean logic functions asynchronously with respect to the processing of said first microprocessor;
(c) a random access memory, said first and second microprocessor each being coupled to said random access memory to provide a first coupling therebetween to communicate with each other via selectively addressed memory locations of said random access memory;
(d) an image register for storing input bits representative of the on/off states of said sensors and output bits representative of the on/off states of said controllable devices, said second microprocessor being coupled to said image register for executing said sequence of boolean logic functions in accordance with the states of said input bits to generate said output bits;
and
(e) other means coupling said second microprocessor to said first microprocessor whereby said second microprocessor signals said first microprocessor to perform digital operations and arithmetic computations for said second microprocessor, the results of operations and computations for said second microprocessor being communicated to said second microprocessor via said random access memory and said second microprocessor generating output bits for controlling the on/off states of controllable devices along said process based upon the results of the operations and computations performed by said first microprocessor for said second microprocessor.

3 more elements

An intelligent programmable process control system responsive to the states of sensors located along the process for controlling the states of controllable devices located along said process comprising:

(a) a first microprocessor means for performing arithmetic and other computations including relatively complex digital operations, said first microprocessor means including interrupt request input means for interrupting the operations of said first microprocessor means;
(b) a second microprocessor means for scanning and executing a sequence of boolean logic functions independent of the operation of said first microprocessor means, said second microprocessor means including control input means for restarting the operation of said second microprocessor;
(c) a random access memory, said first and second microprocessor each means being coupled to said random access memory provide a first coupling therebetween to communicate with each other via selectively addressed memory locations of said random access memory;
(d) an image register means for storing input bits representative of the states of said sensors and output bits representative of the states of said controllable devices said second microprocessor being coupled to said image register for executing said sequence of boolean functions in accordance with the states of said input bits to generate said output bits;
(e) means coupling said second microprocessor other means to the interrupt input means of said first microprocessor means for transmitting interrupt requests to said first microprocessor for execution of arithmetic computations, and other complex operations beyond the capability of said second microprocessor means, said second microprocessor being in an idle state when transmitting an interrupt request to said first microprocessor;
and
(f) means coupling said first microprocessor to the control input means of said second microprocessor controlling the restarting of said second microprocessor.

4 more elements

Dependencies are inferred from the claim text.