Real time digital scan converter

A digital scan converter for supplying an analog signal representing signal information that is supplied by a scanning system of the type wherein said scanning system provides a sequence of discrete analog signals that are associated with a plurality of radially extending scan lines which are angularly spaced apart from one another and referenced to a polar coordinate system, said digital scan converter comprising:

• signal sampling means connected for receiving said sequence of analog signals, said signal sampling means including means for digitizing each of said analog signals at a rate that is determined by the pulse repetition rate of an applied first clock signal to supply an ordered set of digitally encoded signals representative of each of said analog signals;
• first signal generating means for supplying said first clock signal to said signal sampling means, said first signal generating means including means for supplying said first clock signal at a pulse repetition rate proportional to the cosine of the azimuthal angle of the scan line associated with the analog signal currently being supplied to said signal sampling means by said scanning system;
• memory means connected for receiving said ordered sets of digitally encoded signals supplied by said signal sampling means, said memory means for storing values representative of each digitally encoded signal of said sequences of digitally encoded signals, said memory means being addressable to partition said memory means as a rectangular array of storage locations having a predetermined number of columns and a predetermined number of rows;
• memory control means operably interconnected with said memory means and said signal sampling means for loading values corresponding to successive sets of digitally encoded signals into successive column locations of said rectangular array of storage locations with values corresponding to each particular ordered set of digitally encoded words being located into the successive row locations of a single column of said rectangular array of storage locations, said memory control means further including means for sequentially accessing said memory means on a row-by-row basis relative to said rectangular array of storage locations;
• data means for reading the values stored as rows of said rectangular memory array to form a sequence of digitally encoded signals representative of each row of said stored values, said data means for reading said values being responsive to an applied second clock signal and including means for sequentially reading the values within a particular row of said rectangular memory array at a rate determined by the pulse repetition rate of said second clock signal;
• second signal generating means for supplying said second clock signal, said second signal generating means including means for varying said pulse repetition rate of said second clock signal on a row-by-row basis relative to said memory array of said memory means to decrease said pulse repetition rate as each successive row of stored values is read from said memory means;
• and
• digital-to-analog signal conversion means connected for receiving said sequence of digitally encoded signals representative of each of said rows of stored values, said digital-to-analog signal conversion means for supplying said analog output signal representative of said signal information.

A digital scan converter for use with a surveillance system of the type which sequentially emits pulses of energy along a series of n radially extending scan lines that collectively define a sectorial surveillance system, with said scan lines being angularly spaced apart from one another relative to the azimuthal axis of an associated polar coordinate system to supply a sequence of n analog signals having a one-to-one correspondence with said n scan lines with each of said n analog signals representing signal reflection occurring along said corresponding scan line, said digital scan converter for supplying a video information signal representative of a predetermined portion of said sectorial surveillance region for driving a display device which operates on the basis of a Cartesian coordinate system, said video information signal causing said display device to display said predetermined portion of said surveillance region in an orientation wherein said azimuthal axis of said polar coordinate system associated with said scanning system is substantially parallel to the first axis of said Cartesian coordinate system that is associated with said display device, said video information signal including consecutive signal intervals corresponding to m lines of image display that are spaced apart from one another and substantially parallel to the second axis of said Cartesian coordinate system of said display device, said digital signal converter comprising:

• an analog-to-digital converter circuit connected for receiving each of said n analog signals supplied by said surveillance system, said analog-to-digital converter being responsive to an applied first clock signal for supplying a series of digital signal values representative of signal reflection occurring from equally spaced apart incremental regions along the scan line associated with the particular one of said n analog signals that is currently being supplied by said surveillance system;
• first clock means connected for supplying said first clock signal to said analog-to-digital converter, said first clock means including means for establishing the pulse repetition rate of said first clock signal proportional to the magnitude of an applied first control signal;
• first clock control means connected for supplying said first control signal to said first clock means, said first clock control means including means for establishing said first control signal proportional to the cosine of the angle formed between said azimuthal axis and the scan line associated with that one of said n analog signals currently being supplied by said surveillance system, said first clock control means further including means for determining the number of digital signal values produced by said analog-to-digital converter during the time interval during which each particular one of said n analog signals is supplied by said surveillance system including means for establishing said number of digital signal values equal to m when an analog signal that is associated with a scan line which forms the smallest angle with said azimuthal axis is supplied by said surveillance system;
• memory means connected for receiving and storing said digital signal values supplied by said analog-to-digital converter, said memory means being addressable as a rectangular memory array having n column addresses and m row addresses;
• memory control means interconnected with said memory means for loading each series of digital signal values supplied by said analog-to-digital converter into one of said n columns of said memory array with said series of digital signal values representing said n successive analog signals being loaded into corresponding successive column addresses of said memory array, and with the successive digital signal values of each of said series of digital signal values being loaded into successive row addresses of said memory array, said memory control means further including means for accessing the digital signal values stored at each of said row addresses of said memory array;
• digital signal means connected to said memory means for sequentially reading the digital signal values stored at each row address that is accessed by said memory control means, said digital signal means including means responsive to an applied second clock signal for sequentially reading the digital signal values of an accessed row address at a rate that is determined by the pulse repetition rate of said second clock signal;
• second clock means connected for supplying said second clock signal to said data signal means, said second clock means including means for establishing the pulse repetition rate of said second clock signal proportional to the magnitude of an applied second control signal;
• second clock control means connected for supplying said second control signal to said second clock means, said second clock control means including means for establishing said second control signal proportional to the row address of the particular row of digital signal values being accessed by said memory control means to decrease said pulse repetition rate of said second clock signal as successive rows of digital signal values are accessed;
• and
• a digital-to-analog converter circuit connected for receiving said digital signal values as they are successively read by said digital signal means, said digital-to-analog converter for supplying said video information signal that is supplied by said digital scan converter.