Random rhythm pattern generator

A random rhythm-pattern generator comprising:

• a clock pulse generator means for producing basic clock pulses, a frequency divider means for dividing the basic clock pulses, a random pulse generator means producing pulses with random repetition time,
• a condition selecting circuit means for generating an output of plural bits according to an output of the frequency divider means and pulses from the random pulse generator means, the switching of the state of the output condition of the condition selectng circuit means being timed by a pulse from said frequency divider, and the output condition being determined by the output of the random pulse generator means,
• decoder means, to which said plural bit output of the condition selecting circuit is fed, for producing a different single decoded output for each different combination of plural bits,
• gate circuit means for passing through one of the frequency divider output pulses, according to a logical operation of a decoded output of said decoder means and an output pulse of said frequency divider means,
• sound source selection circuit means for receiving the output of the gate circuit means and a particular bit output of the condition selecting circuit means and for carrying out a logical operation on them,
• said selection circuit means having a plurality of outputs only one of which is selected by each said logical operation, and
• a like plurality of sound source circuits respectively connected to the outputs of the selection circuit means so that only the sound source circuit connected to the selected output is selected.

A random rhythm-pattern generator comprising:

• a clock pulse generator means for producing basic clock pulses, a frequency divider means for dividing the basic clock pulses,
• a random pulse generator means having two or more pulse oscillators at least one of which is connected to a duty factor variable circuit,
• a condition selecting circuit means for generating a plural bit output according to one of the outputs of the frequency divider means and to pulses from said random pulse generator means,
• a decoder to which said plural bit output of the condition selecting circuit means is fed,
• a pulse train producing means which memorizes a number of pulse trains with different repetition cycles of which is read out when a particular address is designed by both a set of output pulses of said frequency divider means and a selected output of said decoder, and
• a sound source circuit to which the output of said pulse train producing means is applied.