Power maximization circuit

A power maximization circuit for altering at least on one of the output voltage and current of a power supply to provide maximum output power from the supply, said power supply having means providing a signal indicating output power and means responsive to a control signal for altering the current or voltage, said circuit comprising:

• sampling means including a pair of sample and hold circuits for periodically sampling the output power signal of said power supply and providing a pair of signals corresponding to successive samplings;
• comparison means coupled to said sample and hold circuit for comparing the relative magnitude of the pair of signals from said sampling means and for providing a logic output signal, the logic condition of which is indicative of said relative magnitudes and of increases and decreases in output power of the supply;
• timing means coupled to said sampling means and providing an output signal of predetermined timing,
• logic condition detection means including coincident signal gating means coupled to said comparison means and to said timing means for detecting the logic condition of the comparison means output signal by the coincidence of that signal and the output signal of said timing means;
• and
• means coupled to said logic condition detection means for establishing the power supply control signal in a direction obtaining maximum power output responsive to changes in the logic condition of the comparison means output signal.