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US 4,187,537 AGranted
Full-wave rectifier
AssigneeZenith Radio Corporation
InventorsRichard Avicola, George J. Tzakis
Life of this patent
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Abstract
A full-wave rectifier is disclosed for rectifying low level A.C. input signals. In the disclosed embodiment, the rectifier includes first and second differential amplifiers, each constructed of a pair of transistors. One transistor in each pair of transistors has a D.C. operating point offset from that of the other transistor so that the offset transistor conducts only on an excursion of a given polarity of a received A.C. input signal. Both output currents of the offset transistors are coupled to a load, across which a fully-rectified version of the A.C. input signal is developed.
Claims9
A full-wave rectifier, comprising:
- first differential amplifier means adapted to receive an A.C. input signal and having first and second amplifiers sharing current from a common current source, said first amplifier having a D.C. operating point substantially offset from that of said second amplifier such that said first amplifier conducts substantially only on positive excursions of the A.C. input signal;
- second differential amplifier means adapted to receive the A.C. input signal and having first and second amplifiers sharing current from a common current source, said first amplifier in said second differential amplifier means having a D.C. operating point substantially offset from that of said second amplifier in said second differential amplifier means such that said first amplifier in said second differential amplifier means conducts substantially only on negative excursions of the A.C. input signal;
- a load impedance;
- and
- means coupling the current conducted by the first amplifiers of said first and second differential amplifier means to said load impedance,
- whereby a fully rectified version of the A.C. input signal is developed across said load impedance.
3 more elements
A full-wave rectifier, comprising:
- a first degenerated transistor amplifier and a first non-degenerated transistor amplifier coupled together in a differential amplifier configuration, said first degenerated D.C. amplifier receiving an A.C. input signal and having an output terminal;
- a second degenerated transistor amplifier and a second non-degenerated transistor amplifier coupled together in a differential amplifier configuration, said second non-degenerated transistor amplifier receiving the A.C. input signal and said second degenerated transistor amplifier having an output terminal;
- a load impedance;
- and
- means for coupling the load impedance to said output terminals,
- whereby the first degenerated transistor amplifier conducts substantially only on positive excursions of the A.C. input signal and the second degenerated transistor amplifier conducts substantially only on negative excursions of the A.C. signal to develop a fully rectified version of the A.C. input signal across said load impedance without introducing a substantial D.C. voltage across said load impedance.
3 more elements
A full-wave rectifier, comprising:
- first and second transistor amplifiers having base, emitter and collector terminals and coupled together in a differential amplifier configuration;
- a first current source feeding current to said first and second transistor amplifiers;
- an impedance coupled between the emitter terminal of said first transistor amplifier and said first current source for substantially lowering the D.C. operating point of said first transistor amplifier with respect to said second transistor amplifier;
- means coupling an A.C. input signal and a D.C. bias voltage to the base terminal of said first transistor amplifier;
- third and fourth transistor amplifiers having base, emitter, and collector terminals and coupled together in a differential amplifier configuration;
- a second current source feeding current to said third and fourth transistor amplifiers;
- an impedance coupled between the emitter terminal of said third transistor amplifier and said second current source for substantially lowering the D.C. operating point of said third transistor amplifier with respect to said fourth transistor amplifier;
- means coupling the A.C. input signal and the D.C. bias voltage to the base terminal of said fourth transistor amplifier;
- means coupling the base terminal of the second transistor amplifier to the base terminal of the third transistor amplifier and to the D.C. bias voltage;
- and
- a load coupled to the collector terminals of said first and third transistor amplifiers,
- whereby the first and third transistor amplifiers conduct substantially only on the positive and negative excursions, respectively, of the A.C. input signal for developing a fully rectified version of the A.C. input signal across the load without developing a substantial D.C. voltage across the load.
9 more elements
Dependencies are inferred from the claim text.