Programmable sequence controller

A programmable sequence controller comprising:

• memory means for storing a sequence of control instructions, each of said instructions including an operation command and address data associated with said operation command, wherein said operation commands include test commands or output commands;
• read-out control means for controlling said memory means so as to successively read out each control instruction in said sequence of control instructions therefrom;
• at least one input converter connectable to an external input element for converting an operational state thereof into a logical value;
• a data selector connected to said input converter and responsive to said address data for selecting said logical value of said input element when the input element is designated by said address data;
• logic operation means responsive to a said test command for testing said selected logical value supplied from said data selector and thereafter responsive to a said output command for generating an output command signal based upon the result of the test;
• an addressable output memory having at least two storage locations and adapted to store said output command signal at each of said two storage locations as designated by said address data associated with said output command;
• gate means connected to said input converter and said two storage locations for inhibiting passage of said output command signal from one of said two storage locations when receiving said logical value of said input element and for enabling passage of said output command signal from the one of said two storage locations when receiving said output command signal from the other of said two storage locations;
• and
• at least one output converter connectable to an external output element and connected to said gate means for energizing said output element based upon said output command signal supplied therefrom.