Gate electrode for MNOS semiconductor memory device
AssigneeGTE Laboratories Incorporated
InventorsErnest A. Goldman, Moe S. Wasserman
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Abstract
Optimized switching and retention characteristics of an MNOS memory device are obtained by using as a gate electrode material either metals or semi-metals having a high work function, in conjunction with a gate dielectric layer having a low density of trapping states throughout its volume. The preferred gate electrode materials are either titanium or p.sup.+ -doped polycrystalline silicon.
Claims12
In a semiconductor memory device including a substrate made of a semiconductive material of a first conductivity type, a source and a drain made of a semiconductive material of a second conductivity type and being non-contiguously disposed in surface regions of said substrate so that the substrate surface region between said source and drain defines a channel, a gate insulator covering said channel and at least a portion of said source and drain adjacent to said channel, said gate insulator including a plurality of layers of dielectric material, and a gate electrode covering said gate insulator, an improvement comprising
- a dielectric region within said gate insulator having a density of trapping states of about 2.times.10.sup.12 states per square centimeter and being separated from said channel by a tunneling-conducive distance;
- and
- said gate electrode being made of a conductive material having a work function greater than that of aluminum and capable of adequately adhering to said gate insulator for minimizing electron injection from said gate electrode into the material of said gate insulator during the application of high voltage pulses between said gate electrode and said substrate.
A method for improving the memory retention of a semiconductive memory device of the type normally including a substrate made of a semiconductive material of a first conductivity type, a source and a drain made of semiconductive material of a second conductivity type and being non-contiguously disposed in surface regions between said source and drain to define a channel, a gate insulator covering said channel and at least a portion of said source and drain adjacent to said channel, said gate insulator including a plurality of layers of dielectric material, and a gate electrode covering said gate insulator, said method comprising the steps of:
- forming a dielectric region within said gate insulator having a density of trapping states of about 2.times.10.sup.12 states per square centimeter and at a tunneling-conducive distance from said channel;
- and
- suppressing the flow of electron injection current from said gate electrode into said gate insulator with a conductive material capable of adhering to said gate insulator and having a work function greater than that of aluminum.
A method for suppressing electron injection from the gate electrode into the gate insulator of a semiconductor memory device of the type including a substrate made of a semiconductive material of a first conductivity type, of a source and a drain made of a second conductivity type and being non-contiguously disposed in surface regions of said substrate so that the substrate surface regions between said source and drain define a channel, a gate insulator covering said channel and at least a portion of said source and drain adjacent to said channel, said gate insulator including a plurality of layers of dielectric material, a gate electrode covering said gate insulator, said method comprising the steps of:
- forming a dielectric region within said gate insulator having a density of trapping states of about 2.times.10.sup.12 states per square centimeter and at a tunneling-conducive distance from said channel;
- and
- forming said gate electrode from a conductive material having a work function greater than that of aluminum and being capable of adequately adhering to said gate insulator.
Dependencies are inferred from the claim text.