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US 4,147,964 AGranted
Complementary latching disabling circuit
AssigneeRCA Corporation
InventorsDavid W. Luz, John C. Peer
Life of this patent
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Abstract
An oscillator responsive to a control signal generates a first signal at a first rate at an output terminal. A first transistor is coupled to the output terminal and to a load circuit. Normal operation of the load circuit depends upon the first transistor switching conductive states at the first rate. A second complementary type conductivity transistor forms a complementary disabling latch with the first transistor. A fault signal activates the latch and prevents the first transistor from switching conductive states, thereby disabling normal load circuit operation.
Claims27
A disabling circuit comprising:
- an oscillator circuit with an input terminal responsive to control signals for generating at an output terminal of said oscillator circuit a first signal at a first rate determined by said control signal;
- a first transistor coupled to said output terminal for switching conductive states at said first rate;
- a load circuit coupled to said first transistor, normal operation of said load circuit dependent upon said first transistor switching conductive states at said first rate;
- a second transistor of a conductivity type complementary to said first transistor, the appropriate output and input terminals of each of said first and second transistors coupled to one another in a manner forming a complementary latch;
- and
- an input fault terminal coupled to said complementary latch and responsive to a fault signal coupled to said input fault terminal for activating said complementary latch and preventing said first transistor from switching conductive states, thereby disabling normal operation of said load circuit.
3 more elements
A disabling circuit comprising:
- a source of unregulated voltage for supplying energy;
- a load circuit;
- controllable switching means coupled to said source and said load circuit for transmitting a controlled amount of energy from said source to said load circuit;
- controllable oscillator means with an output terminal coupled to a control terminal of said controllable switching means and responsive to a feedback signal representative of an energy level of said load circuit for providing a switching signal at said output terminal to said controllable switching means for regulating said controlled amount of energy, said oscillator including a first transistor changing conductive states at a first rate;
- a disabling transistor of a conductivity type complementary to that of said first transistor coupled to said first transistor in a manner forming a complementary latch;
- and
- fault signaling means coupled to an input terminal of said complementary latch and responsive to a fault condition within said load circuit for activating said complementary latch during the occurrence of said fault condition for maintaining said first transistor in a first conductive state when said complementary latch is activated for blocking said switching signal.
4 more elements
A disabling circuit for a deflection circuit comprising:
- a deflection circuit;
- output switching means coupled to said deflection circuit for generating first and second deflection intervals;
- a first transistor changing conductive states at a deflection rate in response to deflection rate signals coupled to an input terminal of said first transistor for providing a deflection rate switching signal at an output terminal of said first transistor;
- means for coupling said deflection rate switching signal to said output switching means for generating said first and second deflection intervals;
- a second transistor of a conductivity type complementary to that of said first transistor and coupled to said first transistor in an arrangement forming a complementary latch;
- and
- fault signaling means coupled to a fault input terminal of said complementary latch and responsive to a fault condition occurrence within said deflection circuit for energizing said complementary latch for disabling said output switching means by preventing said first transistor from changing conductive states.
4 more elements
Dependencies are inferred from the claim text.