US 4,137,464 A · Charge-transfer binary search generating circuit

Abstract

A bucket brigade circuit is described for generating a sequence of packets of charge carriers of the form Q.sub.R /2, Q.sub.R /4, Q.sub.R /8....Q.sub.R /2.sup.N where N is an integer. The charge packets thus generated can be employed in combinations in either digital-to-analog or analog-to-digital converters. The charge generation circuit requires two equal capacitors which are used for charge redistribution. To obtain accurate quantities of charge in the generated charge packets the capacitors employed should be large, however the use of large capacitors results in low operating speed because of the large charge transfer time constants involved. The described circuit provides a scheme to reduce charge transfer time constants and therefore obtain greater speed while still permitting the use of large capacitors for high accuracy. The circuit includes a small coupling capacitor connected in series with one of the charge redistribution capacitors to produce a total capacitance which is equal to or smaller than the coupling capacitance. The sequence of charge carriers produced by the circuit can be injected into either a bucket brigade circuit or a charge-coupled-device circuit for use, for example, in digital-to-analog and analog-to-digital converters.

A circuit for generating a binarily decreasing sequence of electrical signal levels comprising:

a first capacitive electrical signal storage means adapted to store up to a predetermined quantity of electrical signal E.sub.R,
a second capacitive electrical signal storage means also adapted to store up to said predetermined quantity of electrical signal E.sub.R,
an electrical signal transfer means including a first switching element providing an open state and a closed state and connected between said first and second capacitive electrical signal storage means for transferring a selected amount of electrical signal of said predetermined quantity of electrical signal E.sub.R from one of said capacitive storage means to the other of said capacitive storage means when said switching element is closed during a given time period,
said first and second capacitive electrical storage means being connected in parallel when said switching element is closed to produce a parallel capacitance value,
an output terminal,
a third capacitive electrical signal storage means having a capacitance relatively smaller than the capacitance of said first and second capacitive electrical signal storage means and having one side thereof connected in series circuit with said second capacitive electrical signal storage means and the other side of said third capacitive electrical signal storage means being connected to said output terminal, said third capacitive electrical signal storage means being connected in series with the parallel combination of said first and second capacitive electrical signal storage means when said switching element is closed to produce a combined capacitance value with said first and second capacitive electrical signal storage means which is less than the said parallel capacitance value of said first and second capacitive electrical signal storage means,
a source of reference potential,
a second switching element connected between said source of reference potential and said first electrical capacitive signal storage means,
and means including first and second signal conductors for producing a plurality of sequential control signals including a first sequence of electrical pulses occurring at a selected time sequence on said first signal conductor connected to said first switching element of said electrical signal transfer means for placing said first switching element into said open and closed states and a second sequence of electrical pulses occurring at said selected time sequence on said second signal conductor connected to said second switching element, said first and second sequence of signals and said associated first and second switching elements operating in combination for controlling the transfer of quantities of electrical signal between said first and second capacitive storage means for producing a binarily decreasing sequence of electrical signal quantities at said output terminal of the form E=E.sub.R /2, E.sub.R /4, E.sub.R /8 up to E.sub.R /2.sup.N where N is a positive integer.

6 more elements

Charge-transfer binary search generating circuit

Life of this patent

Charge-transfer binary search generating circuit

Life of this patent

Abstract

Claims4