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AssigneeTexas Instruments Incorporated
InventorMichael J. Cochran
Estimating the term…
An electronic calculator or microprocessor system of the type preferably having keyboard input and a visual display is implemented with a semiconductor chip having a hexadecimal/binary coded decimal format arithmetic unit for performing arithmetic operations on numeric data inputted by the keyboard further, the system preferably includes an input, an address register responsive to the input, a instruction word memory for storing a number of instruction words and addressable in response to the address stored in the address register, and instruction word decoder logic for decoding instruction words outputted from the instruction word memory and for controlling the arithmetic unit in response thereto. The arithmetic unit is operable in a first mode for providing an output from the arithmetic unit in binary coded decimal format and in a second mode providing an output from the arithmetic unit in hexadecimal format.
In an electronic calculator system having an input means for receiving numeric data and function command, an instruction word memory for storing a number of instruction words and addressable in response to the function commands received by said input means, an instruction word decoder means for decoding instruction words outputted from said instruction word memory, and an arithmetic unit for performing arithmetic operations on numeric data received by said input means, said arithmetic unit comprising:
An electronic calculator system having memory means for storing words of numeric data;
In an electronic microprocessor system of the type having an instruction word memory means for storing instruction words controlling the microprocessor system the improvement comprising a latch circuit responsive to a first instruction word for setting the state of said latch circuit and further responsive to a second instruction word for resetting the state of said latch circuit and an arithmetic circuit responsive to the state of said latch circuit, said arithmetic circuit performing arithmetic operations in the binary base when said latch circuit is in one state and performing arithmetic operations in binary coded decimal base when said latch circuit is in another state.
Dependencies are inferred from the claim text.