Electronic system for capacitively storing a signal voltage of predetermined level

A circuit arrangement for the storage of a signal voltage of predetermined level, comprising:

• two conductors connected across a source of recurrent unipolar clock pulses, one of said conductors being grounded;
• a main storage capacitor and an ancillary storage capacitor both connected to said one of said conductors;
• supply means including at least said one of said conductors for charging said main storage capacitor with a voltage having the same polarity as said clock pulses;
• a normally nonconductive first semiconductor element inserted between said supply means and said main storage capacitor on the side opposite said one of said conductors, said first semiconductor element forming a first junction with said main storage capacitor and being provided with a control electrode;
• a binary capacitor of the same conductivity type as said first semiconductor element inserted between said ancillary storage capacitor and the other of said conductors, said binary capacitor forming with said ancillary storage capacitor a second junction tied to said control electrode, at least one of said junctions being temporarily connectable to an external signaling circuit for the selective charging and discharging of the respective storage capacitor, the capacitance of said binary capacitor in the presence of a clock pulse having a relatively low value in the discharged state of said ancillary storage capacitor and having a relatively high value upon said ancillary storage capacitor carrying a predetermined minimum charge, said high value enabling conduction of said first semiconductor element for the duration of a driving pulse whereby said main storage capacitor is charged from said supply means;
• and
• a second semiconductor element inserted between said junctions for enabling the transfer of charges from said main storage capacitor to said ancillary storage capacitor between clock pulses while preventing a reverse charge transfer in the presence of a clock pulse;
• said supply means including a third semiconductor element inserted between said other of said conductors and said first semiconductor element for transmitting said clock pulses to said main storage capacitor in the conductive condition of said first semiconductor element.