Programmable controller using microprocessor
AssigneeGulf & Western Industries, Inc.
InventorWilliam H. Seipp
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Abstract
There is provided a programmable controller comprising a standard microprocessor having output address terminals and input/output bi-directional data terminals and means for providing a binary code on the data terminals indicative of the status of the machine cycle to be processed by the microprocessor. This programmable controller includes a logic decoder means for producing a selected signal in response to logic signals on selected address terminals and in the status binary code of the data terminals. In addition, the programmable controller includes means for programming the HOLD state for the microprocessor. There is also provided an arrangement for expanding the number of interrupt conditions which can affect the INTERRUPT state of the microprocessor in the programmable controller.
Claims7
A programmable controller of the type using a microprocessor having a plurality of bi-directional data terminals and a plurality of address terminals upon which a binary code address of bits appears, said controller including:
- a set of data lines, data input means for applying a byte of binary data on said set of data lines, said byte having a given bit on one of said data lines to be applied to a selected one of said data terminals for processing by said microprocessor;
- a first logic decoder means connected to said set of data lines for selecting said given bit of said byte on said one of said data lines in response to logic on said address terminals;
- said first logic decoding means having an output for receiving said selected bit;
- and, second logic network means for applying said bit selected by logic on said address terminals and received by said decoder output to said selected one of said data terminals of said microprocessor for bit processing by said microprocessor of binary logic on said selected terminal.
A programmable controller of the type using a microprocessor having a plurality of bi-directional data terminals and a plurality of address terminals upon which a binary code address of bits appears, said controller including:
- a set of data lines, data input means for applying a byte of binary data on said set of data lines, said byte having a given bit on one of said data lines to be applied to a selected one of said data terminals of said microprocessor for processing by said microprocessor;
- decoding means connected to said set of data lines for selecting said given bit on said one of said data lines in said set in response to a coded address on said address terminals of said microprocessor;
- and means for directing said selected bit from said decoding means to said selected one of said data terminals of said microprocessor.
Dependencies are inferred from the claim text.