Head trackable wide angle visual system
AssigneeThe United States of America as represented by the Secretary of the Navy
InventorJohn W. Herndon
Life of this patent
Estimating the term…
Abstract
A human head trackable wide angle visual system is disclosed which probes y given terrain constructed on a model board and causes selected image portions thereof to be projected on a trio of display sectors located on the inside of a spherical screen, with the view thereof being displayed thereon in accordance with control signals that are respectively portional to the turning of said head about a predetermined axis thereof. A head position sensor, a cockpit, a switching logic circuit, a synchronization signals generator, a trio of video switches, the aforesaid screen, and left, middle, and right light projectors are uniquely combined to provide such effects and, thus, simulate a real-life pilot training environment from a model thereof.
Claims25
An object trackable projection system, comprising in combination:
- a predetermined number of predetermined energy projection means;
- a like predetermined number of switch means effectively connected to said predetermined number of predetermined energy projection means for timely and selectively supplying a data signal thereto in response to a number of timing signals;
- means connected to said predetermined number of switch means for selectively and timely supplying said number of timing signals thereto in substantial correspondence with a predetermined number of positions of the aforesaid object, respectively;
- means for producing a predetermined picture image;
- a television camera, having an optical input, a synchronization signal input, and a data signal output, spatially disposed from said predetermined picture image producing means in such manner that the optical input thereof effectively views the picture image produced thereby, with the synchronization signal input thereof connected to the aforesaid timing signal supplying means for response to one of the timing signals supplied thereby, and with the output thereof connected to each of said predetermined number of switch means for supplying said data signal thereto;
- optical probe means disposed between said predetermined picture image producing means and the optical input of said television camera for effecting the optical scanning thereof thereby in accordance with a given drive signal;
- and
- means effectively connected between the aforesaid object and said optical probe means for supplying said given drive signal thereto, so as to effect the driving thereof in substantial correspondence with the aforesaid predetermined number of positions of said object.
A head trackable visual system, comprising in combination:
- a plurality of means for projecting a like plurality of optical images toward a like plurality of visible sectors of a display screen, respectively, in response to a video signal and a plurality of synchronization signals;
- means for generating the aforesaid video signal;
- a plurality of switch means respectively connected to the output of said video signal generating means and the video inputs of said plurality of projecting means for timely supplying said video signal thereto, respectively, in response to a plurality of timing signals;
- means connected to said plurality of switch means for respectively and selectively supplying said plurality of timing signals thereto in response to said plurality of synchronization signals and in correspondence with predetermined dispositions of the aforesaid head;
- and
- means connected to said plurality of projecting means and said plurality of timing signals supplying means for timely supplying the aforesaid plurality of synchronization signals thereto, respectively.
A head trackable wide angle visual system, comprising in combination:
- a master horizontal sync signals generator;
- a first delay line connected to the output of said master horizontal sync signals generator;
- a second delay line connected to the output of said master horizontal sync signals generator;
- a third delay line connected to the output of said master horizontal sync signals generator;
- a fourth delay line having a data input, a control input, and an output, with the data input thereof connected to the output of said master horizontal sync signals generator;
- a first inverter connected to the output of said fourth delay line;
- a selector switch having first and second electrical contacts with a space therebetween and a movable arm adapted for being moved in contact with said first and second electrical contacts and within said space therebetween;
- a ground connected to the aforesaid movable arm of said selector switch;
- a potentiometer having a resistance and a movable arm in slidable contact therewith, with one of the terminals of the resistance thereof connected to the aforesaid ground, and with the movable arm thereof connected to the control input of the aforesaid fourth delay line;
- a positive direct current voltage connected to the other terminal of the resistance of said potentiometer;
- a helmet adapted to be worn by the aforesaid head;
- flexible mechanical means connected between said helmet and the movable arms of the aforesaid selector switch and potentiometer for the turning thereof therewith;
- a second inverter having an input and an output, with the input thereof connected to the output of the aforesaid first delay line;
- a first flipflop having a set input, a reset input, and a Q output, with the set input thereof connected to the output of the said first inverter, and with the reset input thereof connected to the output of the aforesaid first delay line;
- a third inverter connected to one of the electrical contacts of the aforesaid selector switch;
- a fourth inverter connected to the other of the electrical contacts of the aforesaid selector switch;
- a first AND gate having a pair of inputs and an output, with the inputs thereof respectively connected to said electrical contacts of the aforesaid selector switch;
- a fifth inverter having an input and an output, with the input thereof connected to the output of the aforesaid second delay line;
- a second flipflop having a set input, a reset input, and an output, with the set input thereof connected to the output of said first inverter, and with the reset input thereof connected to the output of the aforesaid second delay line;
- a second AND gate having a trio of inputs and an output, with the inputs thereof respectively connected to the output of said second inverter, the Q output of said first flipflop, and the output of said third inverter;
- a third AND gate having a trio of inputs and an output, with the inputs thereof respectively connected to the output of said fourth inverter, the Q output of said second flipflop, and the output of said fifth inverter;
- a sixth inverter connected to the output of said second AND gate;
- a seventh inverter connected to the output of said third AND gate;
- a fourth AND gate having a pair of inputs and an output, with the inputs thereof respectively connected to the outputs of said third and sixth inverters;
- a fifth AND gate having a pair of inputs and an output, with the inputs thereof respectively connected to the outputs of said fourth and seventh inverters;
- an OR circuit having a trio of inputs and an output, with the inputs thereof respectively connected to the outputs of said first, third, and fourth AND gates;
- a television camera having a sync signal input, an optical signal input, and a video signal output, with the sync signal input thereof connected to the output of the aforesaid fourth delay line;
- a rotatable optical probe effectively connected to the optical signal input of said television camera;
- a drive motor effectively connected to said optical probe for timely effecting the rotation thereof about a predetermined axis thereof;
- a servomechanism having an input and an output, with the input thereof effectively connected to the movable arms of said selector switch and potentiometer and the aforesaid helmet, and with the output thereof connected to the input of said drive motor;
- a first video switch having a data input, a control input, and an output, with the data input thereof connected to the video signal output of said television camera, and with the control input thereof connected to the output of the aforesaid second AND gate;
- a second video switch having a data input, a control input, and an output, with the data input thereof connected to the video signal output of said television camera, and with the control input thereof connected to the output of the aforesaid OR circuit;
- a third video switch having a data input, a control input, and an output, with the data input thereof connected to the video signal output of said television camera, and with the control input thereof connected to the output of the aforesaid fifth AND gate;
- a first projector having a data input, a control input, and an output, with the data input thereof connected to the output of said first video switch, and with the control input thereof connected to the output of the aforesaid first delay line;
- a second projector having a data input, a control input, and an output, with the data input thereof connected to the output of said second video switch, and with the control input thereof connected to the output of the aforesaid second delay line;
- a third projector having a data input, a control input, and an output, with the data input thereof connected to the output of said third video switch, and with the control input thereof connected to the output of the aforesaid third delay line;
- means spatially disposed from the aforesaid optical probe in such manner that the light reflected therefrom will be received thereby in accordance with the relative positions therebetween;
- and
- a display screen having a predetermined geometrical configuration positioned in such manner as to have predetermined spatial dispositions with respect to the aforesaid helmet and the outputs of the aforesaid first, second and third projectors.
A switching logic circuit, comprising in combination:
- a first input terminal;
- a first inverter having an input and an output, with the input thereof connected to said first input terminal;
- a second input terminal;
- a first flipflop having a set input, a reset input, and an output, with the set input thereof connected to said second input terminal, and with the reset input thereof connected to said first input terminal;
- a third input terminal;
- a second inverter having an input and an output, with the input thereof connected to said third input terminal;
- a fourth input terminal;
- a first AND gate having a pair of inputs and an output, with the inputs thereof respectively connected to said third and fourth input terminals;
- a third inverter having an input and an output, with the input thereof connected to said fourth input terminal;
- a fifth input terminal;
- a second flipflop having a set input, a reset input, and an output, with the set input thereof connected to said second input terminal, and with the reset input thereof connected to said fifth input terminal;
- a fourth inverter having an input and an output, with the input thereof connected to said fifth input terminal;
- a second AND gate having a trio of inputs and an output, with the inputs thereof respectively connected to the output of said first inverter, the output of said first flipflop, and the output of said second inverter;
- a third AND gate having a trio of inputs and an output, with the inputs thereof respectively connected to the output of said third inverter, the output of said second flipflop, and the output of said fourth inverter;
- a fifth inverter having an input and an output, with the input thereof connected to the output of said second AND gate;
- a sixth inverter having an input and an output, with the input thereof connected to the output of said third AND gate;
- a fourth AND gate having a pair of inputs and an output, with the inputs thereof respectively connected to the outputs of said second and fifth inverters;
- a fifth AND gate having a pair of inputs and an output, with the inputs thereof respectively connected to the outputs of said third and sixth inverters;
- an OR circuit having a trio of inputs, with the inputs thereof respectively connected to the outputs of the aforesaid first AND gate, the aforesaid third AND gate, and the aforesaid fourth AND gate;
- and video switch means for receiving the outputs from said fifth AND gate and OR circuit.
Dependencies are inferred from the claim text.