Single bit logic microprocessor

A logic microprocessor comprising in combination:

• a single serially fed input data controller means having a data input, a control input, and a single data output;
• first and second logic operator means each having a respective single data input commonly coupled to said single data output of said input data controller means and each being fed the same serial data thereby and a single data output;
• data selector means having a pair of data inputs respectively coupled to the single data output of said first and second logic operator means, a control input and a data output;
• an instruction word memory, means for accessing instruction words from said memory, and a decoder responsive to said instruction words for providing a control signal output comprised of at least first and second instruction bits, said first instruction bit being coupled to said first and second logic operator means for enabling said operator means, said second instruction bit being coupled to said input data controller means and said data selector means;
• said input data controller means including means responsive to said second instruction bit to selectively provide a data output signal having either a first (true) or second (not) logic value of the input data applied to said data input thereof;
• said first logic operator means including means set by one of said logic values to perform a predetermined first type of logic operation thereon,
• said second logic operator means including means set by one of said logic values to perform a predetermined second type of logic operation thereon, and
• said data selector means including means responsive to said second instruction bit to provide a data output signal at its data output selectively either the output of said first logic operator means or the output of said second logic operator means.