Data processor with read-only-memory processor and partial solution push-down stack

A data processor comprising:

• (a) boolean logic processor means comprised of a read-only-memory means, said read-only-memory means having a plurality of address inputs for selectively addressing memory locations thereof, said locations containing stored solutions to boolean equations;
• (b) means for applying boolean data to at least one address input of said memory means;
• (c) means for applying multi-bit instructions to a plurality of said address inputs, said processor means for providing stored boolean solutions from the locations addressed in accordance with the boolean data and instructions provided at said address inputs;
• (d) a partial solution memory means in the form of a reversible serial storage means, said reversible storage means having an input coupled to said processor means for receiving and storing single-bit partial solutions to boolean equations provided by said processor means in a predetermined order and having an output coupled to an address input of said processor means for transferring partial solutions stored therein to said processor means in the reverse order from said predetermined order, said processor means for providing stored boolean solutions from the locations addressed in accordance with the partial solutions and instructions provided at said address inputs;
• and
• (e) means for controlling the sequence of operations of said data processor;
• wherein
• (f) boolean data is processed by said processor means into single-bit partial boolean solutions which are stored in said reversible storage means and wherein said partial boolean solutions are combined into single-bit boolean solutions by said processor means taking said partial solutions in reverse order.