Apparatus and method for inhibiting false locking of a phase-locked loop
AssigneeNCR Corporation
InventorsDavid E. Sanders, Ramon P. Chambers, Robert S. Gordy
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Abstract
Apparatus and method are provided to discriminate between true locking of a phase-locked loop on the main lobe of an information signal, and false locking on a side lobe thereof. The energy in the locked signal is sensed and compared with the signal energy at fixed frequency increments, preferably twice the bit clock rate frequency, above and below the lock frequency. A greater energy content at the increment frequencies than at the locked frequency indicates a false lock condition and is used to inhibit the loop from entering a locked mode.
Claims21
In a phase-locked loop circuit adapted to sweep a predetermined frequency range for an input signal within said range and lock on a detected input signal, said input signal being characterized in the frequency spectrum by a relatively high energy main lobe and relatively low energy side lobes, the improvement comprising a false lock inhibit circuit adapted to inhibit the loop from locking on a side lobe of an input signal, said inhibit circuit comprising:
- circuit means for sensing the input signal energy at a test frequency within said frequency range and at a pair of second frequencies, said second frequencies being substantially equal increments respectively greater and less than the test frequency;
- means for comparing the sensed energies;
- and
- means for inhibiting locking of said loop circuit when the energy at the second frequencies exceeds the test frequency energy.
In a phase-locked loop circuit having a sweep means adapted to sweep a predetermined frequency range to lock on the main lobe of an input signal within said range, a phase detector adapted to produce an output data signal representative of the input signal, and an associated bit rate clock means, said input signal being characterized in the frequency spectrum by a relatively high energy main lobe and relatively low energy side lobes, said bit rate clock means having an output frequency substantially equal to the frequency differential between adjacent side lobes of the input signal, the improvement comprising a false lock inhibit circuit adapted to inhibit the loop from locking on a side lobe of the input signal, said inhibit circuit comprising:
- first and second input terminals connected respectively to receive the output of said phase detector and a signal related to the output of said bit rate clock means;
- a signal mixing means connected to receive and mix signals from said first and second input terminals;
- a two-input comparison means adapted to produce an output signal indicative of the higher energy one of its inputs;
- said first input terminal and the output of said signal mixing means being connected respectively as inputs to said comparison means;
- and
- means for inhibiting locking of said loop circuit in response to said comparison means output indicating a greater signal energy level at the output of said signal mixing means than at said first input terminal.
The method of preventing a phase-locked loop circuit from falsely locking on a side lobe of an input signal, said signal being characterized by a relatively high energy main lobe and relatively low energy side lobes, and said loop circuit adapted to sweep a frequency range and test at a plurality of test frequencies for the input signal within said range, comprising, for each test frequency:
- sensing the input signal energy at the test frequency;
- sensing the input signal energy at substantially equal frequency increments above and below the test frequency;
- comparing the sensed signal energies;
- and
- inhibiting the loop from locking when the energy sensed at the test frequency exceeds the energy sensed at the increment frequencies.
The method of operating a phase-locked loop circuit to lock on an input signal, said signal being characterized by a relatively high energy main lobe and relatively low energy side lobes, comprising:
- sweeping a voltage controlled oscillator through a frequency range to test for said input signal;
- comparing the oscillator signal with the input signal;
- generating an error correction voltage based upon said comparison when the oscillator signal differs from the input signal by more than a predetermined amount;
- controlling the oscillator output with said error correction voltage;
- detecting a locked condition when the oscillator signal differs from the input signal by less than said predetermined amount;
- terminating sweeping of the oscillator to lock on the input signal in response to the detection of a locked condition;
- sensing the input signal energy at the oscillator frequency and at frequencies greater and less than the oscillator frequency;
- comparing the sensed signal energies;
- and
- inhibiting the termination of sweeping when the energy sensed at the oscillator frequency is less than the energy sensed at the greater and lesser frequencies by a predetermined amount.
Dependencies are inferred from the claim text.