Digital voltage detecting circuit for a power source
AssigneeKabushiki Kaisha Daini Seikosha
InventorMasaaki Kamiya
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Abstract
The output voltage of a power source is converted into a time signal by a circuit comprising a capacitor to which the voltage is applied, an MOS-FET connected across the capacitor and controlling its discharge rate in accordance with the voltage of the power source and a switching circuit which controls the MOS-FET. The time period representing the voltage of the power source is displayed digitally by counting the number of standard pulses occurring during the time period and digitally displaying the pulse count.
Claims6
A voltage detecting circuit for indicating a decrease in the voltage of a power source from an initial voltage comprising means for converting the voltage of said power source into a corresponding time delay, means providing a reference time corresponding to said initial voltage, means for measuring said time delay and comparing it with said reference time and means for displaying said voltage decrease as a function of the difference between said time delay and said reference time, said converting means comprising a capacitor, means for connecting said capacitor to said power source to be charged thereby, means for discharging said capacitor at a rate dependent on the voltage of said power source, and means for detecting the discharge of said capacitor to a predetermined level, said delay time being the discharge time of said capacitor to said predetermined level after initiation of discharge by said discharging means.
Dependencies are inferred from the claim text.