Composite channel field effect transistor and method of fabrication

A composite channel insulated gate field effect transistor with low sensitivity to threshold shifts caused by hot electrons when operated at high drain voltage levels consisting of:

• a conductive substrate of one conductivity type having first and second spaced apart regions of another conductivity type formed therein defining source and drain regions having a channel region there between at the surface of said substrate, said channel region including third and fourth regions of said one conductivity type separated by a fifth region also of said one conductivity type, with said third and fourth regions having different resistivity and different impurity concentration than said fifth region;
• wherein the doping level of the third and fourth regions is such that, during operation of the device at drain voltage levels above the 3-4 volt range, the P-N junction depletion width at the drain electrode does not extend beyond the bounds of said third or fourth regions;
• and
• a dielectric layer on the surface of said substrate extending between the source and drain regions and a conductive layer upon said dielectric layer.