Discrete-gain output limiter

A discretegain amplifier having an input, an output, and a gain control circuit, the improvement in the gain control circuit comprising:

• a. means for continuously monitoring the input voltage to the amplifier, and producing continuous control voltage output;
• and
• b. means for incrementally varying the gain of the amplifier in response to changes in said control voltage output, said incremental varying means further comprising:
• a plurality of input resistors connected in parallel;
• switch means in series with each resistor for selectively connecting said resistor in parallel with said other resistors;
• a plurality of voltage comparators each having one input connected to said output of said voltage monitoring means, a second input connected to a reference voltage, and an output, each comparator generating a signal on its output whenever said control voltage output exceeds said reference voltage;
• a plurality of data flip flops, one each connected to the output of each comparator and having a complementary output connected to one of said switch means;
• clock pulse generator means having an input connected to the input of said amplifier and an output for generating a pulse upon each zero crossing of the amplifier input voltage;
• and
• means connecting the output of said clock pulse generator to each of said data flip flops for triggering a signal on said complementary output of said data flip flop whereby said flip flop output signal is applied to said switch means at said zero crossings.