Technique for threshold control over edges of devices on silicon-on-sapphire
AssigneeThe United States of America as represented by the Secretary of the Navy
InventorEliyahou Harari
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Abstract
A self-aligning technique for doping the edges of metal-oxide-semiconductor evices fabricated on silicon-on-sapphire to eliminate channel-edge conduction at voltages lower than the device threshold voltage without unnecessarily doping the top conducting surface of the device. A thick masking layer is deposited on the silicon layer. The masking layer is etched locally to expose the silicon in the regions between the devices and the exposed silicon is etched to form islands on the sapphire substrate. In a new step, a partial etch of the masking layer is conducted to expose a narrow frame on the top surface and edges of the silicon island. The resulting structure may be doped by any conventional method to ensure heavier doping at the edges than in the transistor channel region.
Claims8
In a process for fabricating metal-oxide-semiconductor devices of the type wherein a layer of silicon is formed on an insulating substrate and wherein silicon islands are formed on the substrate by removing the silicon in the region between adjacent devices, the improvement comprising a technique for doping the edges of the silicon islands to prevent channel-edge conduction before the device threshold voltage is reached comprising the steps of:
- depositing a thick masking layer on top of the silicon layer;
- forming islands on the substrate by etching away portions of the masking layer and the silicon layer, said islands being mesa-like structures including said masking layer and said silicon layer;
- partially etching said thick masking layer to remove a portion of the mask from the sides of the mask, thereby exposing a frame of the top surface of the silicon as well as the edges of the silicon island, the remainder of the top surface of the silicon being covered by said masking layer;
- and
- doping the exposed edges and the exposed top surface of the silicon to prevent channel-edge conduction.
In a process for fabricating metal-oxide-semiconductor devices of the type wherein a layer of silicon is formed on an insulating substrate and wherein silicon islands are formed on the substrate by removing the silicon in the region between adjacent devices, the improvement comprising a technique for doping the edges of the silicon islands to prevent channel-edge conduction before the device threshold voltage is reached comprising the steps of;
- depositing a thick masking layer on top of the silicon layer;
- depositing a photoresist layer on top of said thick masking layer;
- forming islands on the substrate by etching away portions of the photoresist layer, the masking layer, and the silicon layer, said islands being mesa-like structures including said photoresist layer, said masking layer, and said silicon layer;
- partially etching said thick masking layer to remove a portion of the mask from the sides of the mask, thereby exposing a frame of the top surface of the silicon as well as the edges of the silicon island, the remainder of the top surface of the silicon being covered by said masking layer;
- and
- doping the exposed edges and the exposed top surface of the silicon to prevent channel-edge conduction.
Dependencies are inferred from the claim text.