Controlled impedance connector
AssigneeBurroughs Corporation
InventorRobert V. Hutchison
Life of this patent
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AssigneeBurroughs Corporation
InventorRobert V. Hutchison
Estimating the term…
A controlled impedance connector for providing a high density controlled impedance interface between a computer backplane and printed circuit (PC) logic card circuitry having signal carrying conductors and a ground surface imbedded in a dielectric medium at selected spacings to achieve a desired characteristic impedance. A common ground surface is provided for a plurality of signal conductors which are in a selected geometrical relationship with the ground surface. Another embodiment of the invention uses a plurality of microstrips embedded in a dielectric medium and dielectrically separated from a common ground surface to achieve the desired characteristic impedance.
A multiple signal connector comprising:
A multiple signal connector comprising:
Dependencies are inferred from the claim text.
Drawings are temporarily unavailable. Open the PDF at USPTO
No related US applications are recorded in the indexed filing history.
Shielding material individually surrounding or interposed between mutually spaced contacts: with through openings for individual contacts
Coupling with the edge of the rigid printed circuits or like structures: coupling devices mounted on the edge of the printed circuits
Electrically-conductive connections
Term ended 24 Jan 1995 (estimated)
USPTO file history isn’t available for this patent, so only indexed dates are shown.
The present invention generally relates to plug-in connectors for use with electronic signal processing apparatus. Specifically, the invention is a novel multiple conductor connector for interfacing circuit boards or logic circuit cards to computer backplanes and the like.
In present day digital signal processing apparatus, such as computers, the trend is toward faster switching speeds and multiple signal handling capabilities. That is, presently desired characteristics include higher signal frequencies and greater signal density. However, at switching frequencies over 100 megahertz, the dimensions of conventional printed circuit connectors are significant relative to the wavelengths at such high frequencies. Therefore, the characteristic impedances of the PC connectors become very critical because an impedance mismatch will cause undesired distortion and attenuation of the propagating signals.
Moreover, because present day signal processing equipment is capable of handling many signals, the number of interconnections in the backplane of a computer is quite large. The large number of interconnections along with today's compact circuitry make the capability of handling a greater number of signals with fewer connections a desirable feature. However, conventional PC connectors do not provide such a feature because these prior art devices require two connections for each signal: a signal carrying connection and a reference connection.
The foregoing and other advantages which may be attained from the use of the present invention will become apparent from the following detailed description when read in conjunction with the drawing wherein:
FIG. 1 is a plan view of the pin connector embodiment of the present invention using pins as the conductive elements.
FIG. 2 is a sectional view of the pin connector embodiment of the present invention showing the relative positioning of the conductive pins and the ground surface.
One embodiment of the present invention includes a first row of signal carrying right angle pins 11 and a second row of signal carrying right angle pins 13 which are embedded in a rigid dielectric block 15. At each end of the first row of signal carrying pins 11 is a reference ground pin 17 which is also embedded in the dielectric block 15 in a manner similar to the first signal carrying pins 11. Further embedded within the dielectric block 15 is a metallic foil strip 19 which is located between the rows of right angle pins 11 and 13 and continues along the longitudinal extent of the rows of pins. At each end of the foil strip 19, which is shown in greater detail in FIG. 3, conducting tabs 21 extend at right angles from the respective ends of the foil strip for interconnection with the ground pins 17. Holes 23 are provided in each of the conducting tabs 21 for insertion and conductive connection of the ground pins 17 to the foil strip 19. The foil strip 19 is substantially equidistantly spaced between the rows of right angle pins 11 and 13 along the foil strip. The spacing along the curved sections of the three conductors is slightly larger then the spacing along the linear regions, but does not affect the characteristic impedance achieved by the linear spacing as will be seen below. Finally, suitable locating pins 25 which can be made of plastic or some other rigid insulator are embedded within the dielectric block 15 for the ultimate purpose of aiding the placement and location of the connector of the present invention in a mating connector. The particular embodiment presently being discussed shows one of the locating pins 25 as having its center in line with the centers of the first row of right angle pin 11. The other locating pin 25 is located on the opposite end of the connector and has its center in line with centers of the second row of right angle pin 13. The blunt ends of the right angle pins 11 and 13 and the ground pins 17 may be suitably placed in a printed circuit board 27 as shown in FIGS. 1 and 2.
The above described structure allows a design determination of a characteristic impedance for impedance matching between the connector and the system with which it is used. This particular embodiment is essentially a "wire-over-ground" transmission line system and the characteristic impedance of such a system is given by the following equation: ##EQU1## Where: .epsilon..sub.r is the relative dielectric constant of the ambient medium;
d is the diameter of the signal transmitting wire;