Amplifier circuit having two negative feedback circuits

An amplifier circuit having two negative feedback circuits of different negative feedback ratios comprising:

• an amplifier circuit input terminal;
• an amplifier circuit output terminal;
• a first semiconductor differential amplifier including first and second transistors, having base, emitter and collector electrodes respectively, the emitter electrodes of the first and second transistors being connected to each other, and the base electrode of said first transistor being connected to said amplifier circuit input terminal;
• a load resistor;
• and means for connecting said load resistor between the collector electrode of the second transistor and a reference potential source;
• a second semiconductor differential amplifier including third and fourth transistors, having base, emitter and collector electrodes respectively, the emitter electrodes of said third and fourth transistors being connected to each other, the collector electrode of said third transistor being connected to the collector electrode of said first transistor, the collector electrode of said fourth transistor being connected to the connection point between the collector electrode of said second transistor and said load resistor, the base electrode of said third transistor being connected to the base electrode of said first transistor;
• an amplifier having an input terminal connected to the connection point between the collector electrode of said second transistor and said load resistor, and an output terminal connected to said amplifier circuit output terminal;
• a first negative feedback circuit connected between the output terminal of said amplifier and the base electrode of said second transistor;
• a second negative feedback circuit connected between the output terminal of said amplifier and the base electrode of said fourth transistor;
• first switching means;
• means for connecting said first switching means between the common emitter electrodes of said first and second transistors and a reference potential source;
• second switching means;
• and
• means for connecting said second switching means between the common emitter electrodes of said third and fourth transistors and a reference potential source.