Complementary MOS logic circuit

A complementary MOS logic circuit for obtaining second logic signals corresponding to the state of logic combinations specified by N first logic signals wherein N is greater than 2 which logic circuit comprises a plurality of block series circuits each consisting of a first component series circuit formed of series connected first channel type IG-FET's and a second component series circuit formed of series connected second channel type IG-FET's arranged complementary to said first channel type IG-FET's and having a common output terminal connected to all the component series circuits;

• said N first logic signals or those complementary thereto being selectively supplied to the gates of the first and second channel type IG-FET's to selectively conduct the second logic signals to the output terminal of the complementary MOS logic circuit through a predetermined component series circuit in response to said N first logic signals or those complementary thereto.