Reference signal frequency correction in an electronic timepiece

In an electronic timepiece which comprises a base signal generator;

• a frequency divider for developing a reference signal of one hertz;
• a time information calculation circuit including a second information counter, a minute information counter, an hour information counter and a day information counter;
• a display system for displaying the time information;
• a zero adjustment switch;
• and a zero adjustment control circuit associated with the zero adjustment switch, the improvement comprising:
• a. a duration counter which receives output signals of the hour information counter to develop an inhibit signal when the duration counter counts more than a predetermined time period;
• b. a buffer memory for reading and for storing therein time information from the second information counter;
• c. a control means for controlling the reading operation of the buffer memory in such a manner that the contents of the buffer memory is changed only when the zero adjustment switch is closed at a time when the inhibit signal is not generated;
• d. a reset means for resetting the contents of the duration counter when the zero adjustment switch is closed;
• e. a detection circuit for developing detection signals in accordance with the time information stored in the buffer memory;
• and
• f. a correction signal generator for correcting the frequency of the reference signal in response to the detection signals derived from the detection circuit.