Discrete transform systems using permuter memories
AssigneeThe United States of America as represented by the Secretary of the Navy
InventorsHarper J. Whitehouse, Jeffrey M. Speiser
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AssigneeThe United States of America as represented by the Secretary of the Navy
InventorsHarper J. Whitehouse, Jeffrey M. Speiser
Estimating the term…
High-speed, high-accuracy, apparatus for performing discrete Fourier and crete cosine transforms, suitable for signal processing applications. The apparatus includes a means for switching an input signal from a sample-and-hold circuit to a circuit which includes an integrator in cascade with an amplifier. The outputs of these two circuits are summed in a first summer to give one term, G.sub.0, which is proportional to the d-c component of the input signal. In parallel with the integrator and amplifier is a cascade circuit comprising a first permuter, a filter and a second permuter. A permuter is a special type of memory. The outputs of the sample-and-hold circuit and of the second permuter are summed in a second summer, to result in an output comprising the other transformed terms, G.sub.1, . . . , G.sub.N-1.
Apparatus for taking the discrete transform of a sampled analog input signal, consisting of N data samples, g.sub.0, g.sub.1, . . ., comprising:
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