US 4,068,304 AGranted

Storage hierarchy performance monitor

AssigneeInternational Business Machines Corporation

InventorsWilliam F. Beausoleil, Klim Maling

Life of this patent

Estimating the term…

Loading patent…

Abstract

A machine for emulating the results of multi-level storage hierarchies by providing an associative storage directory for each level other than main storage. Address sequences to drive the directories are derived from a single level digital computer by recording sequences on tape or by dynamically monitoring computer operation. Individual addresses are skewed an appropriate number of bits depending upon the block size and the number of classes being emulated at any given level, so that those bits of the monitored address indicating segment name are presented to the directory for comparison with its contents in the appropriate class. Means are provided for transposing the segment and class names at higher levels to segment and class names at lower levels. Counting means are provided to record hits, misses and pushes at various levels in order to provide data for calculating average access times for the particular multi-level storage hierarchy being emulated.

Claims6

Dependent claims

For use with an address stream derived from the operation of a computer with single level storage, an emulation machine for use in determining the average time for completing memory reference operations in a multi-level storage by emulating the operation of said multi-level storage and thereby obtaining data from which said time can be determined, said machine comprising

multiple directories for receiving and storing addresses from said address stream, one of said directories provided for each level of said multi-level storage other than the main storage level, each of said directories of a size capable of holding all addresses which the corresponding level in said multi-level storage could contain,
comparator means connected to each of said directories for comparing the existing address contents of said directories with successive addresses from said address stream,
updating means connected to said directories for updating the existing addresses in said directories as new addresses are received from said address stream, and
counting means connected to said comparator means to provide a record of hits (compares) and misses (no compares) for fetch and store memory reference from said address stream at each of said directories
whereby data is obtained from which the average time for completing memory references in said multi-level storage can be computed.

2 more elements

Apparatus for emulating an n-level storage heirarchy comprising

n-1 storage directories of settable latches in which storage addresses are stored, each one of said directories corresponding to one level of said n-level storage above the main storage level, each of said directories including latches to store all addresses in the corresponding hierarchical level,
input means connected to said directories for supplying said directories with a copy of each address in an address stream derived from the operation of a general purpose digital computer with a single level storage, said input means including means for passing addresses generated from CPU activity to the highest level directory where the highest level directory is that directory which corresponds to the smallest, highest speed level of the n-level storage, said input means also including means for first passing addresses generated from I/O activity to a directory corresponding to a lower level of said n-level storage,
comparator means connected to said directories for comparing successive addresses from said address stream to addresses stored in said directories, and
counting means connected to said comparators to count the number of compares (hits) and n-compares (misses)
whereby data is accumulated from which the emulated storage hierarchy can be examined.

2 more elements

Dependencies are inferred from the claim text.