Phase-locked loop frequency shift key modulator
AssigneeGTE Sylvania Incorporated
InventorJeffrey C. Otto
Life of this patent
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Abstract
MSK modulating apparatus employing a phase-locked loop. The loop includes a programmable divider which divides the output frequency of the voltage controlled oscillator by a relatively high value if binary 1 information is to be transmitted and by a relatively low value if binary 0 information is to be transmitted. The output of the voltage controlled oscillator is also divided by an output divider to obtain the desired carrier frequency and then filtered to provide a sinusoidal output signal. The resulting output signal varies by a differential frequency above or below a carrier center frequency when transmitting binary 1 or binary 0 data, respectively.
Claims3
Frequency shift key modulating apparatus including in combination
- means for producing a reference frequency signal;
- a voltage controlled oscillator;
- programmable dividing means coupled to the output of the voltage controlled oscillator for dividing the frequency of the output signal from the voltage controlled oscillator by a preset value;
- phase detector means having a first input coupled to said means for providing a reference frequency signal, a second input coupled to the output of said programmable dividing means, and an output coupled to the input of the voltage controlled oscillator to produce a phase-locked loop, in which the frequency of the output signal from the voltage controlled oscillator is equal to the frequency of the reference frequency signal multiplied by the preset value;
- first means for producing a first signal designating a first preset value;
- second means for producing a second signal designating a second preset value;
- and
- selection means coupled to said programmable dividing means and to said first and second means and being operable to receive data signals at a first level and data signals at a second level, said selection means being operable in response to receiving a data signal at the first level to apply said first signal designating a first preset value to said programmable dividing means and being operable in response to receiving a data signal at the second level to apply said second signal designating a second preset value to said programmable dividing means;
- whereby the output signal from the voltage controlled oscillator is at a first frequency when a data signal at the first level is being received by the selection means and the output signal from the voltage controlled oscillator is at a second frequency when a data signal at the second level is being received by the selection means;
- said selection means receiving continuous data signals, each data signal being present during a predetermined time interval, a data signal at said first level for said predetermined time interval representing a first binary digit and a data signal at said second level for said predetermined time interval representing a second binary digit.
Dependencies are inferred from the claim text.