Substrate fed logic and method of fabrication

An integrated circuit having a pair of transistors comprising:

• a substrate of a first conductivity type;
• a first epitaxial layer of conductivity type opposite said first conductivity type on said substrate;
• a second epitaxial layer on said first epitaxial layer of said first conductivity;
• a high impurity concentration of said first conductivity type forming the surface of said second epitaxial layer;
• the remainder of said second epitaxial layer having a substantially linear gradient of impurity concentration decreasing from the boundary with said first epitaxial layer to the boundary with the said high impurity concentration surface;
• a ring of said opposite conductivity type extending through said second layer and partially into said first layer;
• a diffused region of said opposite conductivity type in said surface of said second epitaxial layer within said ring;
• and
• wherein said substrate, first epitaxial layer and said second epitaxial layer are the emitter, base and collector, respectively, of one of said transistors and said first epitaxial layer, second epitaxial layer and said diffused region are the emitter, base, and collector of the other transistor.