Digital phase-locked loop filter

A phase processing system for filtering an input signal to produce a filtered output signal comprising

• a plurality of successively interconnected phase-locked loops, each of said loops including
• means responsive to first and second signals for producing a phase detected output signal representing the phase difference between said first and second signals;
• means responsive to said phase detected output signal and a first clock signal for digitally integrating said phase detected output signal to generate a first control signal whenever the value of said integrated signal reaches a first preselected level and to generate a second control signal whenever the value of said integrated signal reaches a second preselected level;
• means responsive to said first and second control signals and to a second clock signal for controllably changing the number of pulses from said second clock signal in accordance with the generation of said first or second control signal to produce an intermediate clock signal;
• means responsive to said intermediate clock signal of said pulse changing means signal for producing said second signal;
• the first signal of the first one of said successively connected loops being said input signal and the second signal of said first of said successively connected loops being said filtered output signal;
• the first signal of each of the remaining ones of said successively inter-connected loops being a signal selected from the pair of signals comprising the first signal and the second signal of the preceding loop;
• a reference clock means for producing a reference pulse clock signal having a fixed frequency;
• the first clock signal of each of said loops having a preselected frequency determined by the frequency of said reference pulse clock signal;
• the second clock signal of the last of said successively connected plurality of loops having a preselected frequency determined by the frequency of said reference pulse clock signal and the intermediate clock signal of each of said loops except the first one of said loops being connected as the second clock signal of the pulse changing means in each preceding loop.