Circuit arrangement in an electrical device operated with direct-current, especially in a timing relay

A circuit arrangement in an electrical device containing a load which can be supplied with a direct-current voltage of lesser quality and electronic components which can be supplied with a direct-current voltage of greater quality, especially in a timing relay, for supplying the device with energy from an alternating-current network by means of voltage transforming means which can be connected with the alternating-current network and a rectifier arrangement connected in circuit thereafter, the improvement comprising:

• the rectifier arrangement having an output, a first supply branch connected in circuit with said output, a second supply branch connected in circuit with said output, said second supply branch including smoothing means and voltage stabilizer means, reverse current-blocking means for connecting said second supply branch with said output, the load which is to be supplied with the direct-current voltage of lesser quality being connected with the first supply branch and the electronic components which are to be supplied with the direct-currrent voltage of greater quality being connected with the second supply branch, voltage limiter means for maintaining the voltage peak in the first supply branch less than the amplitude of the rectified voltage delivered by the rectifier arrangement, the load supplied with the direct-current voltage of lesser quality including a relay having a winding connected with the first supply branch, the electronic components to be supplied with the direct-current voltage of greater quality comprising a timing circuit, bistable flip-flop stage provided for the timing circuit, circuit means for determining the starting conditions for the bistable flip-flop stage, said timing circuit with the bistable flip-flop stage and said circuit means being connected in circuit with the second supply branch, said timing circuit comprising an integrated switching circuit incorporating the bistable flip-flop stage, a first voltage comparator for setting the bistable flop-flop stage and a second voltage comparator for resetting the bistable flip-flop stage, a voltage divider for producing reference voltages for the first and second voltage comparators, and output amplifier controlled by an output signal of the bistable flip-flop stage, a first "discharge"-transistor controlled by the output signal of the bistable flip-flop stage, said timing circuit further including a timing element composed of a series connection of resistors and a capacitor, said timing element and said voltage divider of the integrated switching circuit being connected with the second supply branch, the capacitor of the timing circuit being connected in parallel with the collector-emitter path of the first "discharge"-transistor, a junction point between the resistors of the timing element and the capacitor of the timing element being connected with a signal input of the second voltage comparator, the output amplifier having an output at which appears an output signal which controls the relay connected with the first supply branch, so that the switching time delay of the relay is determined by the charging time of the timing element-capacitor from the moment of blocking of the first "discharge"-transistor until charging of the timing element-capacitor to the reference voltage value applied at the second voltage comparator, said arrangement being employed in a cut-in delayed timing relay, wherein said circuit means for determining the starting conditions for the bistable flip-flop stage and connected with the second supply branch comprises a resistor by means of which a signal input of the first voltage comparator is connected with ground, a Zener diode by means of which the supply voltage is applied to the signal input of the first voltage comparator, so that there is eliminated the initial triggering of the first voltage comparator brought about by the ground connection after the cut-in operation when the rise of the supply voltage exeeds the Zener voltage and the bistable flip-flop stage is placed by an output signal of the first voltage comparator into a switching state where the " discharge"-transistor is rendered non-conductive for charging of the timing element-capacitor and the output amplifier is controlled to a high output signal peak for de-energizing the relay.

A circuit arrangement in an electrical device containing a load which can be supplied with a direct-current voltage of lesser quality and electronic components which can be supplied with a direct-current voltage of greater quality, especially in a timing relay, for supplying the device with energy from an alternating-current network by means of voltage transforming means which can be connected with the alternating-current network and a rectifier arrangement connected in circuit thereafter, the improvement comprising:

• the rectifier arrangement having an output, a first supply branch connected in circuit with said output, a second supply branch connected in circuit with said output, said second supply branch including smoothing means and voltage stabilizer means, reverse current-blocking means for connecting said second supply branch with said output, the load which is to be supplied with the direct-current voltage of lesser quality being connected with the first supply branch and the electronic components which are to be supplied with the direct-current voltage of greater quality being connected with the second supply branch, voltage limiter means for maintaining the voltage peak in the first supply branch less than the amplitude of the rectified voltage delivered by the rectifier arrangement, the load supplied with the direct-current voltage of lesser quality including a relay having a winding connected with the first supply branch, the electronic components to be supplied with the direct-current voltage of greater quality comprising a timing circuit, bistable flip-flop stage provided for the timing circuit, circuit means for determining the starting conditions for the bistable flip-flop stage, said timing circuit with the bistable flip-flop stage and said circuit means being connected in circuit wiith the second supply branch, said timing circuit comprising an integrated switching circuit incorporating the bistable flip-flop stage, a first voltage comparator for setting the bistable flip-flop stage and a second voltage comparator for resetting the bistable flip-flop stage, a voltage divider for producing reference voltages for the first and second voltage comparators, and output amplifier controlled by an output signal of the bistable flip-flop stage, a first "discharge"-transistor controlled by the output signal of the bistable flip-flop stage, said timing circuit further including a timing element composed of a series connection of resistors and a capacitor, said timing element and said voltage divider of the integrated switching circuit being connected with the second supply branch, the capacitor of the timing circuit being connected in parallel with the collector-emitter path of the first "discharge"-transistor, a junction point between the resistors of the timing element and the capacitor of the timing element being connected with a signal input of the second voltage comparator, the output amplifier having an output at which appears an output signal which controls the relay connected with the first supply branch, so that the switching time delay of the relay is determined by the charging time of the timing element-capacitor from the moment of blocking of the first "discharge"-transistor until charging of the timing element-capacitor to the reference voltage value applied at the second voltage comparator, said arrangement being employed in a cut-off delayed timing relay, wherein there are connected with the first supply branch the relay winding and the collector-emitter path of a "switching"-transistor controlled by the output signal of the output amplifier, said "switching"-transistor being connected in series with said relay winding, said second supply branch having further connected therewith a trigger circuit for triggering the first voltage comparator by applying a trigger-signal voltage, and wherein the timing element-capacitor is connected in parallel with the collector-emitter path of a second "discharge"-transistor, a control circuit provided for the trigger circuit and the second "discharge"-transistor, said control circuit having an external actuated control contact, said control contact when in a closed position rendering conductive the second "discharge"-transistor for discharge of the timing element-capacitor and via the first voltage comparator blocking the first "discharge"-transistor and rendering conductive the "switching"-transistor for energizing the relay, and upon opening the control contact rendering non-conductive the second "discharge"-transistor for charging of the timing element-capacitor.

A circuit arrangement in an electrical device containing a load which can be supplied with a direct-current voltage of lesser quality and electronic components which can be supplied with a direct-current voltage of greater quality, especially in a timing relay, for supplying the device with energy from an alternating-current network by means of voltage transforming means which can be connected with the alternating-current network and a rectifier arrangement connected in circuit thereafter, the improvement comprising:

• the rectifier arrangement having an output, a first supply branch connected in circuit with said output, a second supply branch connected in circuit with said output, said second supply branch including smoothing means and voltage stabilizer means, reverse current-blocking means for connecting said second supply branch with said output, the load which is to be supplied with the direct-current voltage of lesser quality being connected with the first supply branch and the electronic components which are to be supplied with the direct-current voltage of greater quality being connected with the second supply branch, voltage limiter means for maintaining the voltage peak in the first supply branch less than the amplitude of the rectified voltage delivered by the rectifier arrangement, the second supply branch containing as the reverse current-blocking means a diode, as the smoothing means a capacitor and as the voltage stabilizer means a resistor and a Zener diode, and the first supply branch contains as the voltage limiter means a transistor at the base of which there is applied via a resistor the stabilized voltage of the second supply branch.