Method and apparatus for randomizing memory site usage
AssigneeGeneral Electric Company
InventorsWilliam C. Hughes, Wayne B. Nelson, George E. Possin
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Abstract
A method for randomly scrambling the physical address of a block of data, within a memory subject to data site deterioration, by utilizing an auxiliary correspondence memory to pair each logical input/output address with a physical memory address at a random time. Apparatus for implementing the novel method is also disclosed.
Claims25
A method for randomizing memory site usage in a rewritable memory device containing a plurality of data blocks each having a different physical address within the memory device, said memory device having a memory address port at which an address code for accessing a desired one of said plurality of data blocks may appear, said method comprising the steps of:
- a. randomly selecting at least one physical address within the memory device to each designate an initially empty temporary storage data block;
- b. pairing each of a plurality of logical address codes presentable to the device with an address code presentable at the memory address port for a physical address of one of the remaining data blocks;
- c. storing each pair of logical address and physical address in an address correspondence memory means;
- d. generating a substantially random number responsive to each of at least one selected type of data access command to said memory device to access data in a data block therein having a first physical address corresponding to a first logical address simultaneously presented to the auxiliary correspondence memory means;
- e. comparing the substantially random number to a preselected fixed number to generate an exchange enable signal if said numbers are equal;
- f. exchanging the data in the data block having the first physical address with the data in one temporary storage data block having a second physical address, responsive to the exchange enable signal being present;
- and
- g. modifying the auxiliary correspondence memory means to contain the second physical address in correspondence with the first logical address.
Apparatus for randomizing site usage in a re-writable memory device containing a plurality of data blocks each having a different physical address within the memory device, said memory device having a memory address port at which an address code for accessing a desired one of said plurality of said data blocks may appear, comprising:
- first means for storing the address code of each physical address within said device, at least one physical address therein being selected as an initially-empty temporary storage data block, each remaining physical address being stored in correspondence with one of a plurality of logical addresses presentable as the address code to said memory device;
- second means for temporarily storing a first physical address presented by said first means responsive to a first logical address being presented thereto and for temporarily storing a second physical address of a temporary storage data block;
- third means for temporarily storing a block of data at least during an exchange operation;
- fourth means for switching a selected one of the first and second physical addresses stored in said second means to said memory address port respectively responsive to one of first and second control signals;
- fifth means for generating a substantially random one of a predetermined field of numbers responsive to a first index signal;
- control means comprising sixth means responsive to at least one selected type of memory access command, accompained by a first logical address, for generating said first index signal;
- seventh means for respectively generating said first and second control signals if said substantially random number is respectively different from and equal to a predetermined number in said field;
- said fourth means switching said first physical address immediately to said memory address port if said first control signal is present;
- said fourth means switching said second physical address to said memory address port only after switching said first physical address thereto if said second control signal is present;
- and
- eighth means responsive to said second control signal for issuing a sequence of alternate operation codes to said memory device to cause the data stored in the first physical address presented to said memory address port to be exchanged with the data stored in the second physical address presented thereto;
- said control means causing said second physical address to be placed into said first means in correspondence.
Dependencies are inferred from the claim text.