Multilayer flexible printed circuit tape

The method of making multilayer flexible printed circuit tape comprising the steps of:

• forming a first and second imperforate flexible dielectric strips of tape,
• applying an adhesive layer to one side of said first and said second dielectric strips of tape,
• perforating said dielectric strips of tape with a plurality of indexing apertures, a plurality of connection apertures and at least one device aperture, therein,
• bonding conductive foil strips to said adhesive layer on said first and said second dielectric strips of tape,
• forming a conductive pattern in said conductive foil strip on said first dielectric strip of tape to provide a plurality of conductive cantilever leads extending into and over said device aperture and said connection apertures,
• bonding said conductive cantilever leads at said central aperture to the electrical connection points on a semiconductor device,
• forming a conductive pattern in said conductive foil strip on said second dielectric strip of tape to provide a plurality of conductive leads having bonding pads in pattern registration with said conductive cantilever leads at said connection apertures,
• adhesive bonding said first and said second dielectric tapes together at the sides opposite the foil coated sides with said indexing apertures, said connection apertures and said device apertures in pattern registration, and
• bonding said conductive cantilever at said connection apertures to said conductive leads at said bonding pads at said connection apertures to provide a multilayer flexible printed circuit tape.

A multilayer flexible printed circuit tape having conductive attachment leads for interconnecting a plurality of active components comprising:

• a first flexible printed circuit top tape,
• said top tape comprising a first dielectric carrier having a plurality of device apertures therein for receiving active semiconductor devices and a plurality of indexing apertures,
• a first flexible conductive foil pattern bonded to the top of said top tape comprising a plurality of inner flexible conductive fingers each extending over one of said device apertures and a plurality of outer flexible conductive leads,
• semiconductor devices positioned in said apertures and having at least one lead-out pads thereon connected to said inner conductive fingers of said first conductive foil pattern
• a second flexible printed circuit bottom tape,
• said bottom tape comprising a second dielectric carrier having a plurality of device apertures therein for receiving active semiconductor devices and a plurality of indexing apertures, said apertures in said bottom tape having the same location pattern as said apertures in said top tape,
• an adhesive layer bonding the top of said bottom tape to the bottom of said top tape to form a multilayer laminate therewith,
• a second flexible conductive foil pattern bonded to the bottom of said bottom tape comprising a plurality of intermediate flexible conductive paths thereon, and at least one terminal lead-out pad on the bottom of said semiconductor devices,
• said plurality of intermediate flexible conductive paths on said second flexible conductive foil pattern being bonded to said terminal lead-out pad to form an assembled circuit between said terminal lead out pad and said outer flexible conductive leads.