US 4,064,486 AGranted

Data communications loop synchronizer

AssigneeBurroughs Corporation

InventorUlbe Faber

Life of this patent

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Abstract

A loop controller for a data communication network system formed by interconnecting a group of heterogeneous computers, batch terminals and conversational terminals in a ring or loop configuration. Each computer or terminal is connected to the communication network via a communications processor and an interface unit termed a node. The communications processor is responsible for network protocol and activities as well as for interfacing devices to the network. The node provides the only connection to the ring or loop and derives the clock for the communications processor as well as the node itself from the transmitted data. The logocontroller combines timing signals and information signals and forms a sequential stream of alternating control and data characters, each character being n-bits in length. This stream is then placed on the loop for serial transmission to the individual nodes connected to the loop. Signals received by the loop controller are synchronized for retransmission back to the loop.

Claims3

Dependent claims

An apparatus for use with a serial digital transmission loop having alternately characterized information signals including clock information comprising:

a source of clock pulses;
first means responsive to certain of said clock pulses from said source of clock pulses for forming identical information carrying slots to be transmitted by said serial loop;
second means connected between one end of said serial loop and said first means for receiving said alternately characterized information signals from said serial transmission loop;
third means connected between the other end of said serial transmission loop and said second means and responsive to said certain of said clock pulses and to certain other of said clock pulses from said source of clock pulses for formatting information signals in said formed information carrying slots for transmission by said serial transmission loop;
and
fourth means connected between said third means and said first means for characterizing said information signals in said formed information carrying slots responsive to said characterization of said received information signals.

3 more elements

Dependencies are inferred from the claim text.

Facts

Application: 05/581,937Filed 29 May 1975
Granted: 20 Dec 1977
Term ends: Not estimatedThe source records don’t support an estimate.

Classification6 codes

H04L 12/43
With decentralised control: with synchronous transmission, e.g. time division multiplex [TDM], slotted rings
G06F 11/006
Error detection; Error correction; Monitoring: identification
G06F 13/128
Where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine: for dedicated transfers to a network
G06F 13/4213
Being a system bus, e.g. VME bus, Futurebus, Multibus: with asynchronous protocol