Apparatus and method for encoding and decoding digital information

#The present invention pertains to a system for encoding and decoding digital information, and particularly to such a system wherein clock, data and partitioning information may be converted into a serial stream of coded binary bit periods and subsequently recovered.

#A number of self clocking code systems, such as the Manchester code, are generally well known for encoding digital information comprising a data component and a clock component in the form of an encoded signal which comprises a serial stream of binary coded bit periods. An important application for such an encoding system is the storage of digital information on a medium, such as magnetic tape, and its subsequent recovery, wherein the use of separate data and clock channels may be disadvantageous for various reasons. In a common form of the Manchester code, each uncoded logic 1 bit period is defined in the encoded signal by a negative transition in the middle of a coded bit period, and each uncoded logic 0 bit period is defined in the encoded signal by a positive transition in the middle of a coded bit period. The complementary form of the above Manchester code may also be used, wherein uncoded logic 1's are defined in the encoded signal by positive transitions, and logic 0's are defined in the encoded signal by negative transitions.

#If the data component of digital information to be encoded in a self-clocking code system comprises discrete data bit sets, it may be necessary to include partitioning information in the encoded signal to separate, or partition, some or all of the data bit sets from other data bit sets. As is well known, such partitioning information is very important where encoded signals are subject to indeterminate interruptions, for example, where an encoded signal is stored on magnetic tape subject to indeterminate start/stop operations. Such partitioning information is also very important in decoding an encoded signal in which time base instabilities and spurious transitions have been induced. According to conventional practice, a self-clocking code such as the Manchester code may provide separation information by employing a partitioning code comprising a selected number of partitioning bit periods having a selected combination of logic levels. The bits of the partitioning code are inserted into a sequence of uncoded data bit periods following a selected data bit set, encoded in the manner of the data bit periods, and subsequently decoded to separate the selected data bit set. In a Manchester encoded signal, according to the above conventional practice, each uncoded partitioning bit period is represented by a transition in the middle of a coded bit period, whereby it may be indistinguishable from encoded data.

#FIG. 1 is a schematic diagram showing an encoder for an embodiment of the invention coupled to a magnetic recording means.

#FIG. 2 shows a series of waveforms useful in understanding FIG. 1.

#FIG. 3 is a block diagram showing a desliver circuit coupled to the encoder of FIG. 1.

#Referring to FIG. 1, there is shown encoder 10 comprising standard interconnected digital elements, and referring also to FIG. 2 there are shown waveforms comprising the respective inputs and outputs of the digital elements of encoder 10, each referenced input or output of the respective digital elements of encoder 10 corresponding to the same referenced waveform of FIG. 2. Waveforms 2a, 2b, and 2c show the data, clock and partitioning components, respectively, of digital information to be encoded by encoder 10 in a serial encoded signal. The data component shown in 2a comprises sequential data bit sets 100, 101, and, 001, each set being separated by two null bit periods, NN, the width of each data bit period and null bit period being determined by the period of the clock component shown in waveform 2b. While waveform 2a shows three-bit data bit sets, it is to be understood that the present invention could be employed to encode a sequence of data bit sets comprising any number of data bits having any combination of logic levels and which are separated by any number of null bit periods. The partition of each data bit set of waveform 2a is defined by a partitioning pulse, shown in waveform 2c, which has an interval of one clock period.

#The data component shown in waveform 2a and the clock component shown in waveform 2b provide the inputs to exclusive OR gate 12, which has a logic 1 output only when one and only one of its inputs is at logic 1. Consequently, the output of exclusive OR gate 12, shown in waveform 2d, comprises a signal wherein each of the data bit periods and null bit periods are represented in the form of a conventional Manchester code, the Manchester representation of each null bit period being indistinguishable from the representation of a logic zero data bit.

#The output of exclusive OR gate 12 provides an input to AND gate 14, the other input to AND gate 14 comprising complementary partitioning pulses, shown in waveform 2c, which are derived by coupling the partitioning component of waveform 2c through inverter 16. The output of AND gate 14, shown in waveform 2e, is an encoded signal comprising a serial stream of coded bit periods, wherein each uncoded logic 1 data bit period is defined by a negative transition in the middle of a coded bit period, each uncoded logic 0 bit period is defined by a positive transition in the middle of a coded bit period, and each partitioning pulse of the partitioning component is defined by a blank interval B, or coded bit period remaining at logic 0. Each blank interval is followed by a synchronizing interval, Z, a coded bit period in which a positive transition occurs.