Time-multiplex programmable switching apparatus

In a telephone system, digital time-multiplex programmable switching apparatus for establishing on demand, time shared connections between pairs of ports comprising

• a plurality of port means, each of said port means comprising one or more port circuit means having a common buffer memory means, each of said port circuit means having a unique address, said port circuit means including means for generating predetermined digital signaling signals in response to particular condition at said port circuit means and said port circuit means further including means for generating digital information signals when an information input signal is applied,
• central processor unit means including memory means having a plurality of recirculating slots and means for inserting in said memory means slots pairs of port circuit means addresses and information signals directed to said addresses in response to said signaling signals from said port circuit means to establish time-multiplex information exchanging connections between said pairs of port circuit means, and
• common bus means interconnecting all of said plurality of port means and said central processor means.

In a telephone system, digital time-multiplex programmable switching apparatus for establishing on demand, time shared connections between pairs of ports comprising

• a plurality of port means, each of said port means comprising one or more port circuit means having a common buffer memory means, each of said port circuit means having a unique address, said port circuit means including means for generating predetermined digital signaling signals in response to particular conditions at said port circuit means and said port circuit means further including means for generating digital information signals when an information input signal is applied,
• central processor unit means including memory means having a plurality of recirculating slots and means for inserting in said memory means slots pairs of port circuit means addresses and information signals directed to said addresses in response to said signaling signals from said port circuit means to establish time-multiplex information exchanging connections between said pairs of port circuit means and means for controlling the content of said memory means slots in response to signaling signals received from said port circuit means, and
• common bus means interconnecting all of said plurality of port means and said central processor means.