Apparatus and process for testing AC performance of LSI components
AssigneeInternational Business Machines Corporation
InventorsEugen I. Muehldorf, Robert R. Elam
Life of this patent
Estimating the term…
Abstract
Apparatus for determining the AC or switching delay behavior of an LSI circuit. The apparatus measures the signal propagation along different circuit paths to determine the AC characteristic. Each LSI circuit line under test is connected to a display through a line counter logic block. Each line counter logic block responds to a begin count pulse, counter pulses and stop or reset pulses. The logic block provides numerical count to the display until the line under test switches. The numerical counts on the display for the various lines indicates the AC performance of each circuit as they respond to input data over a selected timing interval.
Claims11
A process for testing the AC performance of LSI circuits comprising the steps of
- a. providing a test pattern to an LSI circuit under test,
- b. sensing a plurality of output signals from the circuit under test by one or more logic elements to translate the plurality of output signals into numerical values indicative of the relative switching performance of the circuit,
- c. providing a plurality of different control signals to each logic element, the control signals being correlated with the test pattern to the circuit under test, and
- d. displaying the status of each logic element as an indication of the AC performance of the LSI circuit under test.
A system for determining the AC performance of an LSI circuit comprising
- a. a circuit element under test responsive to an input signal pattern and providing an output signal pattern on a plurality of output lines,
- b. a line counter logic element included in each output line,
- c. control signals to each logic element, the control signals correlated with the input signal to the circuit under test to provide a numerical output from each logic element indicative of the switching behavior of the line under test during a time interval, and
- d. means displaying the numerical output from each logic element whereby the AC performance is displayed for the circuit under test.
Dependencies are inferred from the claim text.