Data processing system having a plurality of channel processors
AssigneeAmdahl Corporation
InventorsRichard L. Bishop, Steven P. Tulloh
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Abstract
Disclosed is a data processing system including a channel unit which services a plurality of channels. The channel unit is connected between the data processing system and the control units which control the operations of I/O devices. The channel unit includes one processor for controlling transfers between channel storage and system storage and having another processor for controlling transfers between input/output devices and channel storage.
Claims14
A data processing system including system storage and channel unit apparatus for transferring data between input/output devices and said system storage over a plurality of channels, each channel connected to one or more input/output devices, said channel unit apparatus comprising,
- channel store means for storing information including said data to be transferred over said channels,
- channel state memory means, storing information for all of said channels, having a plurality of groups of locations, one group for each of said channels where each group stores information for a different associated channel;
- said state memory means including, for each group, first locations for storing a count to designate a remaining transfer length where the remaining transfer length specifies a number of bytes of said data remaining to be transferred over the associated channel, second locations for storing a pointer for defining a location in said channel store means, and third locations for storing an availability number specifying the remaining locations in said channel store means,
- a first processor means operative for each of said channels to control the transfer of said data between said channel store means and said system storage in response to information in said state memory means for an associated channel, said first processor means including means connected to said state memory means for accessing said first, second and third locations for each channel, including means for transferring said data between said channel store means and said system storage by a first transfer amount for each channel, said first processor means including means for changing said availability number of a different associated group for each channel in one direction by the amount equal to said first transfer amount,
- second processor means operative for each of said channels to control the transfer of said data between said channel store means and said input/output devices in response to information in said state memory means for an associated channel, said second processor means including means connected to said state memory means for accessing said first, second and third locations for each channel, including means for transferring said data between said channel store means and said input/output devices by a second transfer amount for each channel, said second processor means including means for changing said availability number of a different associated group for each channel in a direction opposite said one direction by the amount equal to said second transfer amount.
A data processing system including system storage and channel unit apparatus for transferring data between input/output devices and said system storage over a plurality of channels, each channel connected to one or more input/output devices, said channel unit apparatus comprising,
- channel store means for storing information including said data to be transferred over said channels,
- channel state memory means, storing information for all of said channels, having a plurality of groups of locations, one group for each of said channels where each group stores information for a different associated channel;
- a first processor means operative for each of said channels to control the transfer of said data between said channel store means and said system storage in response to information in said state memory means for an associated channel, said first processor means including means connected to said state memory means for accessing first state information from a different one of said groups for each channel, including first means for transferring said data between said channel store means and said system storage in response to the accessed first state information for each channel, said first processor means including means for changing said first state information from a different one of said groups in response to transfers by said first means for transferring,
- second processor means operative for each of said channels to control the transfer of said data between said channel store means and said input/output devices in response to information in said state memory means for an associated channel, said second processor means including means connected to said state memory means for accessing second state information from a different one of said groups for each channel, including second means for transferring said data between said channel store means and said input/output devices in response to the accessed second state information for each channel, said second state information from a different one of said groups in response to transfers by said second means for transferring.
Dependencies are inferred from the claim text.