Proportional spacing and electronic typographic apparatus

A system for controlling the display of a plurality of lines of characters on a display device of the type wherein display lines on said device are repetitively and sequentially scanned at a given line scanning rate and frame scanning rate, said system comprising:

• means for sequentially producing coded first signals corresponding to characters to be displayed, coded second signals corresponding to spaces between characters to be displayed and coded third signals for instructing a carriage return, and for producing code ready strobe signals indicating that each of said first, second and third signals is available for processing,
• a plurality of memories at least equal in number to the number of lines to be displayed and connected to receive said first, second and third signals,
• program means responsive to coded input signals applied thereto for producing video signals corresponding to said first, second and third received signals for application to said display device,
• first, second, third and fourth counters,
• means producing first stepping signals, and means applying said first stepping signals to said first counter,
• a source of line count pulses synchronized with said lines,
• means applying said line count pulses to said second counter,
• means responsive to the output of said second counter for sequentially nondestructively reading out data stored in said memories to said program means, whereby each of said momories is read out in synchronism with said first stepping signal,
• means responsive to said code ready strobe signals for stepping said third counter only during a time period corresponding to a given display line in the display device,
• means responsive to said third signal for stepping said fourth counter,
• means responsive to comparison of the counts in said first and second counters with the counts in said third and fourth counters respectively for producing a coincidence signal, and
• means responsive to said coincidence signal following a code ready strobe signal for enabling a memory corresponding at the time to said given line to store a first, second or third signal applied thereto.

An alpha numeric display system comprising a display device for displaying a line of characters wherein said display device is periodically scanned at a given rate to display said line,

• a recirculating memory, means for sequentially storing first coded signals in said recirculating memory corresponding to characters to be displayed in said line,
• means for storing a second coded signal in said memory corresponding to a carriage return function,
• a clocking circuit for producing stepping signals, means applying said stepping signals to said memory for reading out coded signals stored therein,
• means responsive to coded signals read out of said memory for activating said display device to display the corresponding characters,
• means applying coded signals read out of said memory to said clocking circuit,
• said clocking circuit comprising means responsive to said first coded signals for producing stepping signals of durations selectively dependent upon the first coded signals applied thereto, and means responsive to said second coded signals for producing stepping signals of a constant repetition rate faster than the stepping signals responsive to said first coded signals.

An alpha numeric display system comprising a display device for displaying a line of characters wherein said display device is periodically scanned at a given rate to display said line,

• a first memory, means for sequentially storing in said memory first coded signals corresponding to characters to be displayed in said line, and second coded signals corresponding to tab function signals,
• clock means,
• means for sequentially nondestructively reading out the contents of said first memory,
• means synchronized with said clock means and responsive to said first coded signals read out of said memory for activating said display device to display the corresponding characters,
• a second memory, means for sequentially addressing the contents of said second memory in synchronism with said clock means at a constant rate, so that the storage positions in said second memory correspond to positions in said line, means for inserting third coded signals in said second memory corresponding to preset tab stop positions,
• means responsive to a second coded signal read out of said first memory for inhibiting the sequential read out of said first memory, and
• means responsive to the read out of a third coded signal from said second memory for reactivating the sequential read out of said first memory.

A system for controlling the display of characters on a display device of the type wherein a display line on said device is repetitively scanned at a given rate, said system comprising

• means for sequentially producing coded first signals corresponding to characters to be displayed and for producing a code ready strobe signal indicating that each corresponding one of said first signals is available for processing,
• a memory,
• means applying said first signals to said memory,
• first and second address storing means,
• means for producing stepping signals for sequentially stepping addresses stored in said first address storing means, said means for producing including means for sequentially addressing said memory,
• means responsive to said code ready strobe signal for sequentially stepping addresses stored in said second address storing means,
• means responsive to a comparison of the addresses stored in said first and second address storing means for enabling said memory to store a first signal applied thereto following a code ready strobe signal corresponding to said first signal, and
• means coupled to said memory for producing video signals corresponding to said stored first signals for application to said display device.

A system for controlling the display of a plurality of lines of characters on a display device of the type wherein display lines on said device are repetitively and sequentially scanned at a given line scanning rate and frame scanning rate, said system comprising:

• means for sequentially producing coded first signals corresponding to characters to be displayed, coded second signals corresponding to spaces between characters to be displayed and coded third signals for instructing a carriage return, and for producing code ready strobe signals indicating that each of said first, second and third signals is available for processing,
• a plurality of memories at least equal in number to the number of lines to be displayed and connected to receive said first, second and third signals,
• program means responsive to coded input signals applied thereto for producing video signals corresponding to said first, second and third received signals for application to said display device,
• first, second, third and fourth address storing means,
• means producing first stepping signals, and means applying said first stepping signals to said first address storing means for sequentially changing an address stored therein,
• a source of line count pulses synchronized with said lines,
• means applying said line count pulses to said second address storing means for sequentially stepping an address stored therein,
• means responsive to the addresses stored in said second address storing means for sequentially nondestructively reading out data stored in said memories to said program means, whereby each of said memories is read out in synchronism with said first stepping signal,
• means responsive to said code ready strobe signals for changing the address stored in said third address storing means only during a time period corresponding to a given display line in the display device,
• means responsive to said third signals for sequentially changing the address stored in said fourth address storing means,
• means responsive to a comparison of the addresses stored in said first and second address storing means with the addresses stored in said third and fourth address storing means respectively for producing a coincidence signals, and means responsive to each of said coincidence signals following a corresponding code ready strobe signal for enabling a memory corresponding at the time to said given line to store a first, second or third signal applied thereto.