Modular binary half-adder
AssigneeHewlett-Packard Company
InventorsDavid Steven Maitland, Sandy Lee Chumbley, Havyn E. Bradley
Life of this patent
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Abstract
Half-adder logic modules employing separate summing and carry circuitry are used in the construction of a modular binary half-adder. Carry bits of less significant digits are calculated independent of and prior to the calculation of corresponding sum bits, thus allowing rapid propagation of such carry bits to more significant digits and subsequent parallel summation of the sum bits using the carry bits previously calculated.
Claims10
Binary half-adder module comprising:
- a storage element for retaining a logical bit of binary data in states corresponding to either a logical "1" or a logical "0", wherein the output can be monitored while the input is being changed;
- a first inverter responsive to the output of said storage element for providing a logical signal complementary to the logical output of said storage element;
- means for applying an input carry signal (corresponding to either a logical "1" or a logical "0") to said binary half-adder module;
- a second inverter responsive to said input carry signal for providing a logical signal complementary to said input carry signal;
- means for charging an output carry line;
- means for applying an increment signal to said binary half-adder module;
- means for discharging said output carry line upon detection of a charge on the logical output of said storage element and detection of said increment signal;
- means for discharging said output carry line upon detection of said input carry signal corresponding to a logical "0" ;
- means for applying a decrement signal to the binary half-adder module;
- means for discharging said output carry line upon detection of a signal corresponding to a logical "1" on the output of said first inverter and detection of said decrement signal;
- means for applying an update signal to an update signal line;
- means for recirculating the contents of said storage element upon detection of signals corresponding to the logical "1" on the output of said second inverter and the update signal line;
- and
- means for loading the signal on the output of said first inverter into the storage element upon detection of said input carry signal and said signal on the update signal line each corresponding to a logical "1"
A binary logic module adapted to receive a first input signal I, a second input signal I complementary to the first input signal, and a carry-in signal C, said module for providing a carry-out signal K and an output signal S, each signal having a voltage level corresponding to either a logical "1" or a logical "0", the module comprising:
- first MOS inverter logic means responsive to the carry-in signal C for providing a first control signal in response to the carry-in signal C corresponding to a logical "0" and for providing a second control signal in response to the carry-in signal C corresponding to a logical "1";
- means for presetting the carry-out signal K to a first predetermined voltage level corresponding to a logical "1";
- Mos carry logic means coupled to receive the first control signal and the second input signal I for setting the carry-out signal K to a second predetermined voltage level corresponding to logical "0" in response to either receiving a first control signal or in response to receiving a second input signal I corresponding to a logical "1";
- and
- Mos output logic means coupled to receive the first and second control signals, the first input signal I, and the second input signal I, for providing an output signal S corresponding to the input signal I in response to receiving the first control signal and for providing an output signal S corresponding to the complementary signal I in response to receiving the second control signal.
Dependencies are inferred from the claim text.