Ghost signal eliminating system

#The present invention relates to a ghost signal eliminating system for eliminating ghost signals appearing on the picture image of a television receiver set.

#In a television receiver set, ghosts are one of the causes of deterioration of the quality of the picture. Many approaches to prevent ghosting have been tried but none has proved satisfactory. For example, there has been proposed the approach of cancelling out a ghost by generating a signal having the same delay time and amplitude as those of the ghost through circuit means. However, this approach has not been fully put into practice because inexpensive and variable delay time delay line have not been available. Recently, as a delay element which satisfies the above requirement, a supersonic delay line which utilizes a surface wave and a charge transfer device such as BBD, CCD have been developed and an investigation to put them into practice is in progress.

#It is, therefore, an object of the present invention to provide a ghost eliminating system having an additional delay time control means suitable for the delay time control of a variable delay circuit including a surface wave delay line or a charge transfer device.

#The above and other objects, features and advantages of the present invention will become more apparent from the following detailed description of the preferred embodiments of the invention when taken in conjunction with the accompanying drawings, in which:

#FIG. 1 is a block diagram of a major portion of a television receiver set equipped with a ghost eliminating system of the present invention.

#FIG. 2 is a plan view of a part used in the televison receiver set of FIG. 1.

#The present invention will now be described in detail. Referring to FIG. 1, a system is shown in which a surface wave delay line is used in a variable delay circuit. In the drawing, an incoming electromagnetic wave including a ghost is received by an antenna 1, passes through a tuner 2 to a video intermediate frequency amplifier 3 where it is amplified, thence to a detector stage 4 on the one hand and to a variable delay circuit 5 on the other. The delay time of the variable delay circuit 5 is controlled by a delay time control unit 6. An output from the variable delay circuit 5 passes through a gain control circuit 7 and a detector 8 where it is converted to a ghost elimination signal, which is then applied to a subtraction circuit 9 in which the ghost signal is removed from the original signal and the resulting signal is distributed to a video amplifier 10, a color signal amplifier 11 and a horizontal-vertical deflection circuit 12. That portion of the drawing which is encircled by a dotted line is the ghost eliminating system.

#Examples of a surface wave delay line used in the variable delay circuit 5 and input and output circuits thereof are shown in FIGS. 2, 3 and 4, respectively. The surface wave delay line of FIG. 2 comprises a surface wave delay line substrate 13 having a plurality of comb-like electrodes 14 arranged at the input and the output. The delay time of such a surface wave delay line is determined by the length of spacing between the input electrode and the output electrode. Therefore, by applying an input signal selectively to the input electrodes a, b and c arranged at a narrow pitch, fine control of the delay time is accomplished, and by switching the output electrodes d, e and f arranged at a large pitch, coarse control of the delay time is attained. For example, when ten input electrodes are arranged at a pitch corresponding to 0.1 .mu. sec. and ten output electrodes are arranged at a pitch corresponding to 1 .mu. sec., the delay time can be adjusted in the range of 0.1 - 10 .mu. sec. in 0.1 .mu. sec. steps by appropriately switching both input and output electrodes. In switching the input signal an input circuit as shown in FIG. 3 may be used. A signal from the intermediate frequency amplifier 3 passes through capacitors C.sub.1, C.sub.2 and C.sub.3 in FIG. 3 to the bases of transistors TR.sub.1, TR.sub.2 and TR.sub.3. If, for example, a positive voltage is applied to a terminal B only and terminals A and C are grounded, only the transistor TR.sub.2 conducts producing an output only at an electrode b. FIG. 4 shows an output circuit for switching the output signal in which signals at electrodes d, e and f having different delay time from each other are applied to bases of transistors TR.sub.4, TR.sub.5 and TR.sub.6. An output may be taken by selectively rendering one of the transistors conductive by selective application of terminal voltages at terminals D, E and F. The electrodes a, b, c, d, e and f in FIGS. 3 and 4 correspond to the electrodes a, b, c, d, e and f in FIG. 2, respectively. In order to sequentially change the delay time of the surface wave delay line of FIG. 2, it is necessary to apply voltages at the terminals in FIGS. 3 and 4 in the sequence shown in the table below.

#Table I ______________________________________ Delay Time Increase .fwdarw. ______________________________________ Positive Potential Input A B C A B C A B C Terminals Positive Potential D D D E E E F F F Output Terminal ______________________________________