Light triggered thyristor having controlled turn on delay
AssigneeGeneral Electric Company
InventorArmand P. Ferro
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AssigneeGeneral Electric Company
InventorArmand P. Ferro
Estimating the term…
A light triggered thyristor is provided including an electrode surrounding a gate area which is sensitive to radiation impinging thereon to turn on the device. Trimable resistor means are connected between said electrode and the cathode of the device to allow adjustment of the turn-on time of the device to compensate for processing tolerances during the manufacture of the device.
In a radiation triggered thyristor having an anode, a cathode and a radiation sensitive gate region, the improvement for providing adjustable turn-on time comprising:
A light triggered thyristor having adjustable turn-on delay time comprising:
Dependencies are inferred from the claim text.
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The devices having three or more potential barriers, e.g. photothyristors: photothyristors
Solar cells and light sensors
Term ended 11 Oct 1994 (estimated)
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This invention relates in general to thyristor devices and more particularly to light triggered thyristors having integral resistor means for controlling the turn-on characteristics of the thyristor.
It is often times desirable to utilize multiple thyristors in either series or parallel circuit relationship in order to achieve higher voltage and/or current capability than would be realizable utilizing a single device. The turn-on characteristics of thyristors are known to vary from device-to-device due to tolerances attendant the processes utilized in the manufacture of the devices. Accordingly, it is necessary when utilizing multiple devices which are intended to be simultaneously triggered, to provide means for modifying the turn-on times of the individual devices to, as closely as possible, match them. The turn-on of thyristor devices varies with the magnitude of voltage applied to the gate terminals thereof. The turn-on delay, that is the time between the application of a gate signal and the turn-on of the high current carrying portion of the device, varies with the gate voltage applied and also from device-to-device. As the gate turn-on signal is increased in magnitude, the turn-on delay decreases. The extent to which the gate turn-on signal may be increased in magnitude is limited both by the device and by other considerations such as the size and, therefore, cost of the turn-on signal source. It is, of course, desirable to provide turn-on with as small a gate source as possible consistent with achieving satisfactory turn-on characteristics. Insofar as turn-on delay times increase with decreasing magnitude turn-on signals, it is especially important to provide closely matched turn-on times for multiple device systems.
Special problems are involved in multiple light fired thyristor systems insofar as the nature of the gate turn-on signal is a light signal rather than an electrical signal. Typically, light fired thyristors do not include a gate terminal and adjustment of the turn-on signal applied to the device in order to accommodate varying device characteristics is often times difficult to achieve. As light fired thyristor devices become more widely used especially in high voltage, high current applications, the matching of these devices in order to achieve substantially simultaneous turn-on likewise increases in importance.
The features of the invention which are believed to be novel are pointed out with particularity in the appended claims. The invention itself, however, both as to its organization and method of operation together with further objects and advantages thereof may best be understood by reference to the following description taken in connection with the accompanying drawings in which:
FIG. 1 illustrates a monolithic thyristor structure utilizing a semiconductor resistor in accordance with one aspect of this invention.
FIG. 2 illustrates a light triggered center gated thyristor structure in accordance with this invention.
The device of FIG. 1 is of the monolithic type often utilized in the medium current and voltage ranges. FIG. 1 illustrates a four-layer device having an electrically conductive electrode 10 having a first contact surface 12 and a second surface 14. First semiconductor layer 16 overlies electrode 10 and is joined thereto at surface 14. Semiconductor layer 16 may conveniently be of silicon or other semiconductor material well known to those skilled in the art. Semiconductor layer 16 may further be of either p or n-conductivity type semiconductor material, p-type being more common and therefore utilized in the illustration of this invention shown in FIG. 1. As is well known, thyristor devices are conventionally formed in four layers of alternating p and n-type conductivity semiconductor material. While the device of FIG. 1 is a pnpn device, it will be understood that the invention as herein described applies equally well to variations of four-layer devices such as triacs, and to other light triggered or activated devices. Second semiconductor layer 18 overlies layer 16 and is of opposite conductivity type. A first semiconductor junction 20 is formed between layers 16 and 18. A third semiconductor layer 22 overlies layer 18 and is of opposite conductivity type as layer 18. A second semiconductor junction 24 is formed between layers 22 and 18. Layers 16 and 22 are typically formed by diffusion into an n-conductivity type wafer having surfaces 26 and 14. Semiconductor layer 22 includes surface 26 which is opposite junction 24. A first semiconductor region 28 extends from surface 26 of semiconductor layer 22 down into layer 22 towards, but not meeting, junction 24. Semiconductor region 28 is of opposite conductivity type as layer 22 and forms the main emitter of the device. Semiconductor region 28 may also be variously formed as is well known to those skilled in the art, as for example, by diffusion. It will be appreciated by reference to FIG. 1 that only the central portion of a device in accordance with this invention is shown and described herein. Various methods are known for the design of the edges of thyristor devices, as for example, beveling, either positive or negative, moat etches and others. It will be appreciated that this invention may be applied equally well to a device including any of these edge treatments and therefore only the central portions of the device including the inner portion of the main emitter is shown. Semiconductor region 28 along with metallization 30 comprise the main emitter and contact therefor of the device. Although shown in a generally square geometry it will be appreciated that other geometries may readily be employed if desired. Within main emitter 28 second semiconductor region 32 extends from surface 26 of semiconductor layer 22 down towards, but not meeting semiconductor junction 24. Semiconductor region 32 is also of opposite conductivity type semiconductor material as layer 22 and form, along with metallization 34 the pilot emitter of the device. Electrode 36 which is located within the pilot thyristor region of the device surrounds light sensitive gate area 38. The operation of light triggered thyristor devices is by now well known to those skilled in the art. Accordingly, extensive discussion of the mechanisms involved in light firing will not be included herein. Light will be understood to impinge upon the device in the light sensitive area and to penetrate therethrough to semiconductor junction 24 and the depletion region adjacent thereto to form hole-electron pairs near the junction. Current flows from electrode 12 towards light sensitive gate region 38 and then laterally in layer 22 beneath the pilot thyristor region including region 32 and electrode 34 towards the main emitter which includes semiconductor region 28 and electrode 30. As will be appreciated, current flowing laterally beneath the auxiliary semiconductor will cause that region of the device to turn on which in turn will increase the current flow through the device in the gate region associated with the main thyristor section thereby causing the main emitter to turn on.
In accordance with this invention, at least part of the current flowing in the device due to radiation impinging upon the gate area is collected by electrode 36 which is connected at three points to a resistor comprising semiconductor layer 40. Semiconductor layer 40 is arranged in a generally X shaped configuration, one leg of which is connected to metallization 42 which is an extension of electrode 30, the emitter electrode of the device. Electrode 42 is insulated from the device except where in comes in contact with resistive layer 40, by oxide layer 44. Oxide layer 44 also provides for the isolation of metallization 34 from semiconductor region 32 at the outside edge thereof and also insulates the inside edge of electrode 30 from semiconductor layer 22. The combination of electrode 36, resistive layer 40 and electrode 42 comprise a resistor in parallel with the resistor comprising semiconductor layer 22 extending laterally from the light sensitive gate region beneath the pilot thyristor and towards the main thyristor region of the device. The ratio of the resistances of the path followed by current generated in the light sensitive gate area and the resistance of the combination of electrode 36, resistive layer 40 and electrode 42 determine the ratio of currents flowing in the two paths. It will be appreciated that only the current flowing in semiconductor layer 22 will tend to turn on the device of FIG. 1. The current which is carried by electrode 36, resistive layer 40 and electrode 42 tends to shunt some of the current generated by light impinging on light sensitive gate area 38 directly to the emitter of the device thereby reducing the turn-on threshold of the device for a given incident light intensity. The device of FIG. 1 is readily adapted to be finely adjusted to select a particular turn-on delay time characteristic. It will be appreciated that the resistance between electrode 36 and electrode 30 will be determined almost entirely by the resistance of semiconductor layer 40. Semiconductor layer 40 is illustrated in FIG. 1 as a region extending from surface 26 of semiconductor layer 22 down towards, but not meeting, junction 24. Semiconductor layer 40 may conveniently be formed at the same time as layer 28 during a diffusion or other process. The depth of semiconductor layer 40 will determine the resistivitity thereof and the diffusion process may be continued for either a longer or shorter time than that which forms regions 32 and 28 in order to provide an appropriate resistance. Further, electrode 42 extends over leg 46 of resistive layer 40 effectively shorting out a portion thereof underlying electrode 42. Electrode 42 may conveniently be trimmed, as for example, by laser trimming methods well known to those skilled in the art to increase the total resistance of the effective portion of resistive layer 40 between electrodes 36 and 42. Accordingly, electrode 46 may be initially formed so as to substantially completely overlying leg 46 and, if desired, portions of the remaining three legs of the resistive layer. The effective resistance between electrodes 36 and 42 may then be changed over a fairly wide range by trimming away portions of electrode 42.
It will be appreciated that electrode 42 itself may be made of a material having a significant resistance thereby providing, in series, a resistive combination which would equal the sum of the resistance due to layer 40 and electr-de 42.